Semiconductor device and a manufacturing method thereof
US-2016035739-A1 · Feb 4, 2016 · US
US10950723B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10950723-B2 |
| Application number | US-201616068919-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 17, 2016 |
| Priority date | Feb 5, 2016 |
| Publication date | Mar 16, 2021 |
| Grant date | Mar 16, 2021 |
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In a semiconductor device with a wide gap semiconductor, a gate insulating film is made of a material having a barrier against a minor carrier in an n-type body layer and having no barrier against a minor carrier in a p-type drift layer. As a result, in the semiconductor device with the wide gap semiconductor, a reduction in a conduction loss can be achieved while realizing an improvement in blocking resistance and securing reliability of the gate insulating film.
Opening claim text (preview).
The invention claimed is: 1. A semiconductor device with a wide gap semiconductor, comprising: a vertical MISFET including: a semiconductor substrate that includes a back surface layer having a first conductivity type, arranged on a back surface side, and made of the wide gap semiconductor with a high impurity concentration and a drift layer having the first conductivity type, arranged on a front surface side, and made of the wide gap semiconductor with a lower impurity concentration than that of the back surface layer; a body layer having a second conductivity type, arranged over the drift layer, and made of the wide gap semiconductor; a source region having the first conductivity type, arranged in an upper layer portion of the body layer, and made of the wide gap semiconductor having a higher impurity concentration than that of the drift layer; a trench gate structure that is arranged in a trench disposed from a surface of the source region to a depth deeper than the body layer, and includes a gate insulating film arranged on an inner wall surface of the trench and a gate electrode arranged on the gate insulating film; a source electrode that is electrically connected to the source region; a drain electrode that is electrically connected to the back surface layer of the semiconductor substrate on the back surface side; and an interlayer insulating film sandwiched between the source electrode and the gate electrode in a depth direction of the trench, the source region being formed between the interlayer insulating film and the body layer, wherein: the gate insulating film is made of a material having a barrier against a minority carrier in the body layer and having no barrier against a minority carrier in the drift layer, and the gate insulating film directly contacts the drift layer. 2. The semiconductor device according to claim 1 , wherein: the gate insulating film is made of the material having a dielectric constant larger than the wide gap semiconductor. 3. The semiconductor device according to claim 1 , wherein: the first conductivity type is p-type; the second conductivity type is n-type; and the wide gap semiconductor is diamond. 4. A circuit comprising: the semiconductor device according to claim 1 , wherein: a gate resistor is connected to the gate electrode. 5. The circuit comprising the semiconductor device according to claim 4 , further comprising: a reflux diode arranged between the source electrode and the drain electrode. 6. A circuit comprising: the semiconductor device according to claim 1 , the circuit further comprising: a reflux diode arranged between the source electrode and the drain electrode. 7. The semiconductor device according to claim 1 , wherein: the gate insulating film is formed of at least HfO 2 . 8. The semiconductor device according to claim 1 , wherein: the gate insulating film directly contacts the body layer. 9. The semiconductor device according to claim 8 , wherein: the body layer directly contacts the source electrode. 10. The semiconductor device according to claim 1 , wherein: the body layer directly contacts the source electrode. 11. The semiconductor device according to claim 1 , wherein: a part of the source electrode is formed at a position deeper than the source region in the depth direction of the trench. 12. The semiconductor device according to claim 1 , wherein: the interlayer insulating film contacts the source region.
for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies · CPC title
Diamond · CPC title
being perpendicular to the channel plane · CPC title
the thicknesses being non-uniform · CPC title
within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title
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