Circuit, touch chip, and electronic device for capacitance detection

Patent metadata

Field	Value
Publication number	US-10949032-B2
Application number	US-201916664854-A
Country	US
Kind code	B2
Filing date	Oct 26, 2019
Priority date	Sep 7, 2018
Publication date	Mar 16, 2021
Grant date	Mar 16, 2021

Abstract

The present disclosure discloses a circuit, touch chip, and electronic device for capacitance detection. The circuit for capacitance detection comprises: a control module ( 112 ), a charge transfer module ( 142 ), a processing module ( 152 ), a driving module ( 122 ), and an offsetting module ( 132 ), the control module ( 112 ) being configured to charge a detection capacitor (Cx) by controlling the driving module ( 122 ), the offsetting module ( 132 ) being configured to charge an offset capacitor (Cc), and control the offset capacitor (Cc) to perform charge offsetting on the detection capacitor (Cx); the charge transfer module ( 142 ) being configured to convert charge of the detection capacitor after the charge offsetting to generate an output voltage (V OUT ); and the processing module ( 152 ) being configured to determine, based on the output voltage (V OUT ), a capacitance variation of the detection capacitor (Cx) before and after the detection capacitor is affected by an external electric field.

First claim

What is claimed is:

1. A circuit for capacitance detection, comprising: a control module, a charge transfer module, a processing module, a driving module, and an offsetting module, the control module being configured to: during a first detection period, control the driving module to positively charge a detection capacitor and control the offsetting module to negatively charge an offset capacitor in a same time interval, control the charged offset capacitor to perform charge offsetting on the charged detection capacitor to offset a base capacitance of the detection capacitor, and control the charge transfer module to convert charge of the detection capacitor after the charge offsetting to generate a first output voltage; and during a second detection period adjacent to the first detection period, control the driving module to discharge the detection capacitor and control the offsetting module to positively charge the offset capacitor in a same time duration, control the charged offset capacitor to perform charge offsetting on the discharged detection capacitor to offset the base capacitance, and control the charge transfer module to convert charge of the detection capacitor after the charge offsetting to generate a second output voltage; and the processing module being configured to determine, based on the first output voltage and the second output voltage, a capacitance variation of the detection capacitor before and after the detection capacitor is affected by an external electric field.

2. The circuit according to claim 1 , wherein the driving module comprises a first switching unit, and the control module is further configured to control the first switching unit to be in a closed state, such that the driving module charges the detection capacitor.

3. The circuit according to claim 2 , wherein the driving module further comprises a ninth switching unit, and the control module is further configured to control the ninth switching unit to be in a first closed state, and the first switching unit to be in the closed state, such that the driving module positively charges the detection capacitor, and a first terminal of the detection capacitor is electrically connected to a first voltage, a second terminal of the detection capacitor is electrically connected to a second voltage, and the first voltage is higher than the second voltage.

4. The circuit according to claim 3 , wherein the control module is further configured to control the ninth switching unit to be in a second closed state, and the first switching unit to be in the closed state, such that the driving module discharges the detection capacitor, and the first terminal of the detection capacitor is electrically connected to a seventh voltage, and the seventh voltage is lower than the first voltage.

5. The circuit according to claim 4 , wherein the offsetting module comprises a second switching unit and a third switching unit, the control module is further configured to control the second switching unit and the third switching unit to be in a first closed state and form a charging branch circuit, such that the offsetting module charges the offset capacitor; and accordingly, the control module is further configured to control the second switching unit and the third switching unit to be in a second closed state and form an offsetting branch circuit, such that the offset capacitor performs charge offsetting on the detection capacitor.

6. The circuit according to claim 5 , wherein the offsetting module further comprises a tenth switching unit, an eleventh switching unit and a twelfth switching unit and the control module is further configured to control the tenth switching unit and the eleventh switching unit to be in the first closed state, and form the charging branch circuit when the second switching unit and the third switching unit are in the first closed state, such that the offsetting module negatively charges the offset capacitor, and a first terminal of the offset capacitor is electrically connected to a third voltage, and the second terminal of the offset capacitor is electrically connected to a fourth voltage, and the fourth voltage is high than the third voltage, and accordingly, the control module is further configured to control the twelfth switching unit to be in the first closed state and form the offsetting branch circuit when the second switching unit and the third switching unit are in the second closed state, such that the charged offset capacitor performs charge offsetting on the charged detection capacitor, and the second terminal of the offset capacitor is electrically connected to a fifth voltage, and the fifth voltage is lower than or equal to the second voltage.

7. The circuit according to claim 6 , wherein the control module is further configured to control the tenth switching unit and the eleventh switching unit to be in the second closed state, and form the charging branch circuit when the second switching unit and the third switching unit are in the first closed state, such that the offsetting module positively charges the offset capacitor, and the first terminal of the offset capacitor is electrically connected to an eighth voltage, and the eighth voltage is higher than the third voltage, and the second terminal of the offset capacitor is electrically connected to a ninth voltage, and the ninth voltage is lower than the fourth voltage; and accordingly, the control module is further configured to control the twelfth switching unit to be in the second closed state and form the offsetting branch circuit when the second switching unit and the third switching unit are in the second closed state, such that the charged offset capacitor performs charge offsetting on the discharged detection capacitor, and the second terminal of the offset capacitor is electrically connected to the tenth voltage, and the tenth voltage is higher than the fifth voltage.

8. The circuit according to claim 1 , wherein the circuit further comprises a fourth switching unit, and the control module is further configured to control the fourth switching unit to be in a closed state, such that the charge transfer module is electrically connected to the detection capacitor, to convert the charge of the detection capacitor after the charge offsetting to generate the first output voltage during the first detection period and the second output voltage during the second detection period.

9. The circuit according to claim 8 , wherein the control module is further configured to control the fourth switching unit to be in an off state, to reset the charge transfer module.

10. The circuit according to claim 9 , wherein when there are at least two of the detection capacitors, then each of the detection capacitor is equipped with one of the driving module and one of the offsetting module.

11. A touch chip, comprising a circuit for capacitance detection, the circuit comprising: a control module, a charge transfer module, a processing module, a driving module, and an offsetting module, the control module being configured to: during a first detection period, control the driving module to positively charge a detection capacitor and control the offsetting module to negatively charge an offset capacitor in a same time interval, control the charged offset capacitor to perform charge offsetting on the charged detection capacitor to offset a base capacitance of the detection capacitor, and control the charge transfer module being configured to convert charge of the detection capacitor after the charge offsetting to generate a first output voltage; and during a second detection period adjacent to the first detection period, control the driving module to discharge the detection capacitor and control the offset

Assignees

• Shenzhen Goodix Tech Co Ltd

Inventors

• Jiang Hong
• Tang Zhi

Classifications

• G06F3/044 Primary

  by capacitive means · CPC title

• G06F3/0446

  using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes · CPC title

• G06F3/0416

  Control or interface arrangements specially adapted for digitisers · CPC title

• G01R27/2605

  Measuring capacitance (capacitive sensors G01D5/24) · CPC title

• G06F3/04166 Primary

  Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving (Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184) · CPC title