Grid array connector system

Patent metadata

Field	Value
Publication number	US-10939555-B2
Application number	US-201816624294-A
Country	US
Kind code	B2
Filing date	Sep 17, 2018
Priority date	Sep 15, 2017
Publication date	Mar 2, 2021
Grant date	Mar 2, 2021

Abstract

A grid array connector system is provided that includes cables connected to pedestals that are mounted on a board. The cables include conductors that are connected to support vias positioned in openings in the board and the conductors are connected to the support vias. The board includes signal pads and ground pads that allow the grid array connector system to be connected to other pads provided on a mating surface in a compact manner.

First claim

We claim:

1. A grid array connector system, comprising:
a board that includes a plurality of openings that are arranged in pairs, wherein a support via is positioned in each of the plurality of openings;
a plurality of pedestals mounted on the board, each of the pedestals of the plurality of pedestals positioned around a pair of apertures;
a plurality of cables, each cable of the plurality of cables supported by one of the pedestals, each of the cables including a pair of conductors with a first end of each conductor positioned in one of the plurality of apertures, the first ends aligned with the corresponding support vias; and
a housing formed around a portion of the plurality of cables and a substrate.

2. The grid array connector system of claim 1 , wherein the first ends are welded to the corresponding signal vias.

3. The grid array connector system of claim 2 , wherein each cable of the plurality of cables includes a shield layer that is electrically connected to the corresponding pedestal.

4. A grid array connector system, comprising:
a board with a mounting surface and a connecting surface opposite the mounting surface and a plurality of connecting passages extending therebetween, each of the connecting passages including a first and second opening, the board further including a plurality of signal pads on the connecting surface;
a plurality of first pedestals mounted on the mounting surface;
a plurality of second pedestals electrically connected to the first pedestals;
a plurality of cables, each cable including a shield layer surround an insulative layer and a pair of conductors positioned in the insulative layer, the shield layer of each cable of the plurality of cables connected to one of the plurality of second pedestals, wherein each of the conductors is electrically connected to one of the signal pads; and
a housing positioned on the board that at least partially covers the plurality of first and second pedestals.

5. The grid array connector system of claim 4 , wherein the plurality of cables are arranged in columns that extend out of the housing.

6. The grid array connector system of claim 5 , wherein the cables and pedestals are potted in place.

7. A grid array connector system mounted adjacent a chip package, comprising:
a circuit board supporting the chip package, the circuit board having a first array of pads on a side of the chip package, the first array of pads being in communication with the chip package;
a grid array connector system positioned on one side of the chip package and aligned with the first array of pads, the grid array connector including:
a board with a mounting surface and a connecting surface opposite the mounting surface and a plurality of openings provided in the board, the board further including a plurality of signal pads on the connecting surface;
a plurality of first pedestals mounted on the mounting surface;
a plurality of second pedestals electrically connected to the first pedestals;
a plurality of cables, each cable including a shield layer surround an insulative layer and a pair of conductors positioned in the insulative layer, the shield layer of each cable of the plurality of cables connected to one of the second pedestals, wherein each of the conductors is electrically connected to one of the plurality of signal pads;
a housing positioned on the board and at least partially covering the plurality of first and second pedestals; and
an interposer member positioned between the circuit board and the board, the interposer member including a plurality of contacts that connect the signal pads on the board to the array of pads on the circuit board; and
a heat sink mounted on the circuit board, the heat sink configured to press against the chip package and bias the grid array connector system toward the chip package.

8. The grid array connector system of claim 7 , further comprising a compression member positioned between the heat sink and the grid array connector system, the compression member configured to press against the housing of the grid array connector system.

9. The grid array connector system of claim 8 , wherein the housing includes a plurality of pegs that extend past the board and, the interposer and extend into the circuit board.

10. A grid array connector system, comprising:
a board with a mounting surface and a connecting surface and a pair of openings provided in the board, the board having a ground plane adjacent the mounting surface and a plurality of pads on the connecting surface;
a support via positioned in each of the openings;
a pedestal positioned on the mounting surface and connected to the ground plane, the ground plane being electrically connected to one of the plurality of pads; and
a cable with two conductors and a shield layer positioned in the pedestal, the shield layer electrically connected to the pedestal, each of the two conductors connected to one of the support vias.

11. The grid array connector system of claim 10 , further comprising a housing mounted on the board, the housing covering the pedestal.

12. The grid array connector system of claim 11 , wherein the conductors are welded to the respective support via.

13. The grid array connector system of claim 12 , wherein the housing is formed of a low-pressure molded material that covers the pedestal.

14. The grid array connector system of claim 13 , wherein the pedestal is a first pedestal and the cable is inserted into a second pedestal, the shield layer being directly connected to the second pedestal and the second pedestal being inserted into the first pedestal, the first and second pedestal being connected together.

15. The grid array connector system of claim 14 , wherein the second pedestal has an interference fit with the first pedestal.

16. The grid array connector system of claim 10 , wherein the conductors are welded to the respective support via.

17. The grid array connector system of claim 10 , wherein the housing is formed of a low-pressure molded material that covers the pedestal.

18. The grid array connector system of claim 10 , wherein the pedestal is a first pedestal and the cable is inserted into a second pedestal, the shield layer being directly connected to the second pedestal and the second pedestal being inserted into the first pedestal, the first and second pedestal being connected together.

Assignees

• Molex Llc

Inventors

• Lloyd Brian Keith
• Reed Bruce
• Walz Gregory
• Waggener Colby
• Tsai Chitaou

Classifications

• H10W99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H05K1/184 Primary

  associated with components inserted in holes through the PCBs and wherein terminals of the components are connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes · CPC title

• H01R13/6594

  the shield being mounted on a PCB and connected to conductive members · CPC title

• H05K2201/10189

  Non-printed connector · CPC title

• H05K2201/10378

  Interposers · CPC title