Post-tessellation blending in a GPU pipeline

Patent metadata

Field	Value
Publication number	US-10937228-B2
Application number	US-201916376071-A
Country	US
Kind code	B2
Filing date	Apr 5, 2019
Priority date	Apr 5, 2018
Publication date	Mar 2, 2021
Grant date	Mar 2, 2021

Abstract

Implementations of blender hardware perform both domain shading and blending and whilst some vertices may not require blending, all vertices require domain shading. The blender hardware includes a cache and/or a content addressable memory and these data structures are used to reduce duplicate domain shading operations.

First claim

What is claimed is:

1. A GPU pipeline comprising a tessellation unit and post-tessellation blender hardware, wherein the blender hardware comprises:
an input for receiving a domain space vertex output by the tessellation unit, the domain space vertex comprising:
UV coordinates of the vertex,
a blend weight of the vertex, and
where UV coordinates of neighbour vertices are not inherent from the UV coordinates of the vertex itself, the UV coordinates of the neighbour vertices;

a cache arranged to store data pairs, each data pair comprising a respective UV coordinate and a respective world space vertex generated from the respective UV coordinate by a domain shader; and
a blend unit arranged to receive the blend weight of the domain space vertex, world space vertices for the domain space vertex and its neighbour vertices generated by a domain shader or accessed from the cache, and to generate a single world space vertex for the domain space vertex using the blend weight,
wherein the cache is arranged to, in the event of a cache hit at a cache entry for a UV coordinate, output a world space vertex corresponding to the UV coordinate from the cache entry, and in the event of a cache miss for the UV coordinate, output the UV coordinate to a domain shader; and
wherein the cache is arranged to receive and store world space vertices generated by the domain shader for input vertices and their neighbours.

2. The GPU pipeline according to claim 1 , wherein the blender hardware further comprises:
a blend weight assessment logic block comprising hardware logic arranged to determine if the blend weight of the domain space vertex is equal to one and in response to determining that the blend weight of the domain space vertex is not equal to one, to output the UV coordinates of neighbours of the domain space vertex to the cache.

3. The GPU pipeline according to claim 2 , wherein the blend weight assessment logic block is further arranged, in response to determining that the blend weight of the domain space vertex is equal to one, to output the UV coordinates of the vertex to the cache and wherein the cache is arranged to, in the event of a cache hit at a cache entry for any of the UV coordinates of a neighbour of the domain space vertex, output the world space vertex from the cache entry, and in the event of a cache miss for the UV coordinates of one or more of the neighbours of the domain space vertex, output the UV coordinates of the one or more neighbours to a domain shader.

4. The GPU pipeline according to claim 2 , wherein the blend weight assessment logic block is further arranged, in response to determining that the blend weight of the domain space vertex is equal to one, to output the UV coordinates of the domain space vertex to a domain shader.

5. The GPU pipeline according to claim 1 , wherein the blender hardware further comprises:
a vertex decompression hardware logic block arranged to generate the UV coordinates of the neighbour vertices from the domain space vertex and output the UV coordinates of the neighbour vertices to the cache;
a blend weight assessment logic block comprising hardware logic arranged to determine if the blend weight of the domain space vertex is equal to one, and in response to determining that the blend weight of the domain space vertex is not equal to one, to output the domain space vertex to the vertex decompression hardware logic block.

6. The GPU pipeline according to claim 1 , wherein the cache is further arranged in response to receiving a new world space vertex from the domain shader when all entries in the cache are full, to evict a data pair from a selected entry in the cache and store the received world space vertex in the selected entry.

7. The GPU pipeline according to claim 6 , wherein the cache is further arranged to select an oldest entry in the cache for eviction.

8. The GPU pipeline according to claim 6 , wherein the cache is further arranged to select an entry in the cache for eviction comprising a UV coordinate that is furthest away in UV space from a UV coordinate corresponding to the received new world space vertex.

9. The GPU pipeline according to claim 1 , wherein the blender hardware further comprises:
a domain shader arranged to receive surface patch data, perform a shading operation on any UV coordinate input to the domain shader to generate a world space vertex corresponding to the UV coordinate input and output the world space vertex corresponding to the UV coordinate input to the cache and to the blend unit.

10. The GPU pipeline according to claim 1 , wherein the blend unit comprises:
a linear averaging hardware logic block comprising an input for receiving one or more world space vertices of neighbour vertices and hardware logic arranged to generate a linear average of all neighbour world space vertices using fixed weights; and
a hardware interpolation block comprising an input for receiving a world space vertex for the domain space vertex itself, a world space vertex output by the linear averaging hardware logic block and the blend weight and hardware logic arranged to perform a linear interpolation of the world space vertex for the domain space vertex itself and the world space vertex output by the linear averaging hardware logic block using the blend weight to generate the single world space vertex for the domain space vertex.

11. A method of performing post-tessellation blending comprising:
receiving a domain space vertex output by the tessellation unit, the domain space vertex comprising:
UV coordinates of the vertex,
a blend weight of the vertex, and
where UV coordinates of neighbour vertices are not inherent from the UV coordinates of the vertex itself, the UV coordinates of the neighbour vertices;

storing data pairs in a cache, each data pair comprising a respective UV coordinate and a respective world space vertex generated from the respective UV coordinate by a domain shader;
in response to a cache hit at an entry for a UV coordinate in the cache, outputting the world space vertex corresponding to the UV coordinate from the cache entry;
in response to a cache miss at an entry for the UV coordinate in the cache, outputting the UV coordinate to a domain shader and generating, in the domain shader, a world space vertex from the UV coordinate; and
once world space vertices for the vertex and neighbour vertices have been output from the cache or the domain shader, generating, in a blend unit, a single world space vertex for the domain space vertex using the blend weight.

12. The method according to claim 11 , further comprising:
generating the UV coordinates of the neighbour vertices from the domain space vertex.

13. A GPU pipeline comprising a tessellation unit and post-tessellation blender hardware, wherein the blender hardware comprises:
an input for receiving a domain space vertex output by the tessellation unit, the domain space vertex comprising:
UV coordinates of the vertex,
a blend weight of the vertex, and
where UV coordinates of neighbour vertices are not inherent from the UV coordinates of the vertex itself, the UV coordinates of the neighbour vertices;

a content addressable memory arranged to store data tuples, each data tuple comprising a UV coordinate, a patch reference and an index;
a counter arranged to be incremented when a data tuple is evicted from the content addressable memory;
a blend unit arranged to receive the blend weight of the domain space vertex, world space vertices for the domain space vertex and its neighbour vertices generated in a single task by at least one domain shader, and to generate a single world space vertex for the domain space v

Assignees

• Imagination Tech Ltd

Inventors

• Lacey Peter Malcolm
• Fenney Simon
• Hector Tobias
• King Ian

Classifications

• G06T15/005 Primary

  General purpose rendering architectures · CPC title

• G06T2200/28

  involving image processing hardware · CPC title

• G06T17/20 Primary

  Finite element generation, e.g. wire-frame surface description, {tesselation} · CPC title

• G06F9/382

  Pipelined decoding, e.g. using predecoding · CPC title

• G06T1/20 Primary

  Processor architectures; Processor configuration, e.g. pipelining · CPC title