Temperature monitoring

US10935439B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10935439-B2
Application numberUS-201816105484-A
CountryUS
Kind codeB2
Filing dateAug 20, 2018
Priority dateAug 29, 2017
Publication dateMar 2, 2021
Grant dateMar 2, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

This application relates to methods and apparatus for temperature monitoring for integrated circuits, and in particular to temperature monitoring using a locked-loop circuits, e.g. FLLs, PLLs or DLLs. According to embodiments a locked-loop circuit ( 200, 600 ) includes a controlled signal timing module ( 201, 601 ), wherein the timing properties of an output signal (S OUT , S FB ) are dependent on a value of a control signal and on temperature. A controller ( 201, 601 ) compares a feedback signal (S FB ) output from the timing module to a reference signal (S REF ) and generates a control signal (S C ) to maintain a desired timing relationship. A temperature monitor ( 202 ) monitors temperature based on the value of the control signal. For FLLs and PLLs the signal timing module may be a controlled oscillator ( 201 ).

First claim

Opening claim text (preview).

The invention claimed is: 1. A locked-loop circuit comprising: a controlled oscillator operable to generate an output signal at an output frequency based on the value of a control signal; and a controller operable to compare a feedback signal derived from the output signal to a reference signal received at a reference signal input to generate said control signal; wherein the controlled oscillator is operable in a first mode in which a value of the control signal required to maintain a certain output frequency changes with temperature; and the circuit comprises a temperature monitor for monitoring a temperature based on the value of the control signal; wherein, in the first mode the controlled oscillator has a first transfer function between the output frequency and the value of the control signal, and wherein the controlled oscillator is further operable in a second mode with a second transfer function between the output frequency and the value of the control signal that exhibits a lesser temperature dependence than the first transfer function. 2. A locked-loop circuit as claimed in claim 1 , wherein the temperature monitor is configured to monitor the value of the control signal for changes that indicate a continuing increase in temperature. 3. A locked-loop circuit as claimed in claim 1 , wherein the control signal comprises a digital signal having a value defined by a digital value. 4. A locked-loop circuit as claimed in claim 1 , wherein the second transfer function exhibits substantially no variation with temperature over a defined temperature range. 5. A locked-loop circuit as claimed in claim 1 , wherein the first transfer function exhibits a variation with temperature over a defined temperature range which has a magnitude which is 20% or greater than that for the second transfer function. 6. A locked-loop circuit as claimed in claim 1 , wherein the circuit is configured to be responsive to a control signal to enable or disable temperature sensing, with the controlled oscillator operating in the first mode when temperature sensing is enabled and in the second mode when temperature sensing is not enabled. 7. A locked-loop circuit as claimed in claim 1 , wherein the locked-loop circuit is a frequency-locked-loop circuit. 8. A locked-loop circuit as claimed in claim 1 , wherein the locked-loop circuit is a phase-locked-loop circuit. 9. A locked-loop circuit as claimed in claim 1 , implemented as an integrated circuit. 10. A locked-loop circuit as claimed in claim 1 , wherein the temperature monitor is configured to monitor the value of the control signal against one or more thresholds and to generate an alert if said thresholds are crossed. 11. A locked-loop circuit as claimed in claim 10 , wherein the circuit is operable such that the output frequency is variable in use and wherein said one or more thresholds are selected based on an indication of the output frequency. 12. A locked-loop circuit as claimed in claim 1 , wherein the temperature monitor is configured to determine an estimate of a present temperature based on the value of the control signal. 13. A locked-loop circuit as claimed in claim 12 , wherein the circuit is configured such that the output frequency is variable in use and wherein the temperature monitor is configured to determine the estimate of the present temperature based on the value of the control signal and on an indication of the output frequency. 14. A locked-loop circuit as claimed in claim 1 , further comprising a switching arrangement in a signal path between the controller and the controlled oscillator, wherein the circuit is operable in a closed-loop mode in which the switching arrangement is configured to supply the control signal to the controlled oscillator from the controller and is further operable in an open-loop mode in which the switching arrangement is configured to supply a defined control value to the controlled oscillator as the control signal. 15. A locked-loop circuit as claimed in claim 14 , wherein, in the open-loop mode the temperature monitor is configured to receive a version of the output signal generated in response to the defined control value and to monitor the temperature by monitoring the frequency of the output signal. 16. A locked-loop circuit as claimed in claim 1 , wherein the controlled oscillator comprises a bias circuit for generating a bias for the controlled oscillator, wherein the bias circuit is configured to generate the bias having a controlled temperature dependence so as to provide a first transfer function for the controlled oscillator between the output frequency and the value of the control signal, wherein the first transfer function has a distinct temperature dependence. 17. A locked-loop circuit as claimed in claim 16 , wherein the controlled oscillator comprises a current controlled oscillator and a programmable current source controlled by the control signal wherein the bias circuit supplies the bias to the programmable current source. 18. A locked-loop circuit as claimed in claim 16 , wherein the bias circuit is configurable so as to provide a bias with a first temperature dependence in the first mode and a second temperature dependence in the second mode. 19. A locked-loop circuit as claimed in claim 1 , wherein the circuit is operable such that the output frequency is variable in use and the temperature monitor is configured to monitor the temperature based on the value of the control signal and an indication of the output frequency. 20. A locked-loop circuit as claimed in claim 19 , wherein the temperature monitor is configured to receive a version of the output signal and determine said indication of the output frequency. 21. A locked-loop circuit as claimed in claim 19 , wherein the circuit comprises a frequency divider configured to apply a frequency division to a version of the output signal based on a controllably variable division value to provide said feedback signal and wherein the temperature monitor is provided with said division value as at least part of the indication of the output frequency. 22. A locked-loop circuit as claimed in claim 19 , wherein the temperature monitor is configured to receive an indication of a reference frequency as at least part of said indication of the output frequency. 23. An electronic device comprising a locked-loop circuit as claimed in claim 1 . 24. An electronic device as claimed in claim 23 , wherein the device is at least one of: a portable device; a battery powered device; a communications device; a mobile or cellular telephone; a smartphone; a computing device; a notebook, laptop or tablet computing device; a wearable device; a smartwatch; a voice-controlled device; and a gaming device. 25. A method of temperature monitoring comprising: operating a locked-loop circuit in a first mode or a second mode to compare a feedback signal derived from an output signal to a reference signal received at a reference signal input to generate a control signal; and monitoring a temperature based on the value of the control signal; wherein, in the first mode the locked-loop circuit has a first transfer function between a frequency of the output signal and the value of the control signal, and wherein in the second mode the locked-loop circuit has a second transfer function between the output of the output signal and the value of the control signal that exhibits a lesser temperature dependence than the first tr

Assignees

Inventors

Classifications

  • Temperature measurement using electric or magnetic components already present in the system to be measured · CPC title

  • Circuits effecting compensation of thermal inertia; Circuits for predicting the stationary value of a temperature · CPC title

  • G01K7/01Primary

    using semiconducting elements having PN junctions (G01K7/02, G01K7/16, G01K7/30 take precedence) · CPC title

  • G01K7/32Primary

    using change of resonant frequency of a crystal · CPC title

  • Thermal management of integrated systems · CPC title

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Frequently asked questions

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What does patent US10935439B2 cover?
This application relates to methods and apparatus for temperature monitoring for integrated circuits, and in particular to temperature monitoring using a locked-loop circuits, e.g. FLLs, PLLs or DLLs. According to embodiments a locked-loop circuit ( 200, 600 ) includes a controlled signal timing module ( 201, 601 ), wherein the timing properties of an output signal (S OUT , S FB ) are dependent…
Who is the assignee on this patent?
Cirrus Logic Int Semiconductor Ltd, Cirrus Logic Inc
What technology area does this patent fall under?
Primary CPC classification G01K7/01. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 02 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).