Power divider/combiner

US10930995B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10930995-B2
Application numberUS-201716088270-A
CountryUS
Kind codeB2
Filing dateFeb 2, 2017
Priority dateJun 3, 2016
Publication dateFeb 23, 2021
Grant dateFeb 23, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided is a power divider/combiner capable of improving reflection characteristics and isolation characteristics. The power divider/combiner is formed by a multilayer board, and a strip conductor is arranged in an inner layer of the multilayer board and a chip resistor is arranged on an outer surface of the multilayer board. The power divider/combiner includes vias, which connect the strip conductor and the chip resistor, and includes stubs mounted between input/output terminals and the vias. With this configuration, it is possible to adjust induction mainly during an odd mode of an even/odd mode operation and to consequently improve reflection characteristics of the input/output terminals and isolation characteristics between the input/output terminals.

First claim

Opening claim text (preview).

The invention claimed is: 1. A power divider/combiner, comprising: a common terminal configured to receive input of a high frequency signal to be divided, or output a combined high frequency signal; a first input/output terminal and a second input/output terminal, which are configured to output a divided high frequency signal or receive input of a high frequency signal to be combined; a first quarter-wave impedance transformer including one end connected to the common terminal and another end connected to the first input/output terminal; a second quarter-wave impedance transformer including one end connected to the common terminal and another end connected to the second input/output terminal; an isolation resistor configured to prevent an interference between a high frequency signal of the first input/output terminal and a high frequency signal of the second input/output terminal; a first line configured to connect the isolation resistor and the first input/output terminal, and having a length that is an integer multiple of half a wavelength; and a second line configured to connect the isolation resistor and the second input/output terminal, and having a length that is an integer multiple of half a wavelength, wherein at least two or more of line portions of the first line and the second line have different impedances and are connected in cascade, wherein the first line includes a first stub at a line portion located at a center in a longitudinal direction of the first line or on a side closer to the first input/output terminal than the center, and wherein the second line includes a second stub at a line portion located at a center in a longitudinal direction of the second line or on a side closer to the second input/output terminal than the center. 2. The power divider/combiner according to claim 1 , further comprising a third stub provided between the first quarter-wave impedance transformer and the second quarter-wave impedance transformer. 3. The power divider/combiner according to claim 1 , comprising a multilayer board including: a strip conductor of the multilayer board inner layer forming each of the terminals, the transformers, the lines, and the stubs; a chip resistor forming the isolation resistor and mounted on an outer surface of the multilayer board; and a vertical connection conductor configured to connect the strip conductor and the chip resistor. 4. The power divider/combiner according to claim 3 , further comprising a ground vertical conductor provided around the vertical connection conductor. 5. The power divider/combiner according to claim 1 , comprising a multilayer board including: a strip conductor of the multilayer board inner layer forming each of the terminals, the transformers, the lines, and the stubs; a chip resistor forming the isolation resistor and mounted on the multilayer board inner layer; and a vertical connection conductor configured to connect the strip conductor and the chip resistor. 6. The power divider/combiner according to claim 5 , further comprising a ground vertical conductor provided around the vertical connection conductor. 7. The power divider/combiner according to claim 1 , wherein the first line and the second line have lengths that are each an odd multiple of half a wavelength. 8. The power divider/combiner according to claim 1 , wherein the first line and the second line have lengths that are each an even multiple of half a wavelength. 9. The power divider/combiner according to claim 1 , wherein the first line includes a fourth stub at a line portion between the first stub and the first input/output terminal side, and wherein the second line includes a fifth stub at a line portion between the second stub and the side of the second input/output terminal side. 10. A power divider/combiner, comprising: a common terminal configured to receive input of a high frequency signal to be divided, or output a combined high frequency signal; a first input/output terminal and a second input/output terminal, which are configured to output a divided high frequency signal or receive input of a high frequency signal to be combined; a quarter-wave impedance transformer including one end connected to the common terminal; a first quarter-wave line including one end connected to the quarter-wave impedance transformer, and another end connected to the first input/output terminal; a second quarter-wave line including one end connected to the quarter-wave impedance transformer, and another end connected to the second input/output terminal; an isolation resistor configured to prevent an interference between a high frequency signal of the first input/output terminal and a high frequency signal of the second input/output terminal; a first line configured to connect the isolation resistor and the first input/output terminal, and having a length that is an integer multiple of half a wavelength; and a second line configured to connect the isolation resistor and the second input/output terminal, and having a length that is an integer multiple of half a wavelength, wherein at least two or more of line portions of the first line and the second line have different impedances and are connected in cascade, wherein the first line includes a first stub at a line portion located at a center in a longitudinal direction of the first line or on a side closer to the first input/output terminal than the center, and wherein the second line includes a second stub at a line portion located at a center in a longitudinal direction of the second line or on a side closer to the second input/output terminal than the center. 11. The power divider/combiner according to claim 10 , further comprising a third stub provided between the first quarter-wave line and the second quarter-wave line. 12. The power divider/combiner according to claim 10 , comprising a multilayer board including: a strip conductor of the multilayer board inner layer forming each of the terminals, the transformers, the lines, and the stubs; a chip resistor forming the isolation resistor and mounted on an outer surface of the multilayer board; and a vertical connection conductor configured to connect the strip conductor and the chip resistor. 13. The power divider/combiner according to claim 12 , further comprising a ground vertical conductor provided around the vertical connection conductor. 14. The power divider/combiner according to claim 10 , comprising a multilayer board including: a strip conductor of the multilayer board inner layer forming each of the terminals, the transformers, the lines, and the stubs; a chip resistor forming the isolation resistor and mounted on the multilayer board inner layer; and a vertical connection conductor configured to connect the strip conductor and the chip resistor. 15. The power divider/combiner according to claim 14 , further comprising a ground vertical conductor provided around the vertical connection conductor. 16. The power divider/combiner according to claim 10 , wherein the first line and the second line have lengths that are each an odd multiple of half a wavelength. 17. The power divider/combiner according to claim 10 , wherein the first line and the second line have lengths that are each an even multiple of half a wavelength. 18. The power divider/combiner according to claim 10 , wherein the first line includes a fourth stub at a line portion between the first stub and the first input/output terminal side, and wherein the second line includes a fifth stub at a line portion between the secon

Assignees

Inventors

Classifications

  • H01P5/19Primary

    of the junction type · CPC title

  • Non-reciprocal transmission devices (H01P1/02 - H01P1/30 take precedence) · CPC title

  • H01P5/16Primary

    Conjugate devices, i.e. devices having at least one port decoupled from one other port · CPC title

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What does patent US10930995B2 cover?
Provided is a power divider/combiner capable of improving reflection characteristics and isolation characteristics. The power divider/combiner is formed by a multilayer board, and a strip conductor is arranged in an inner layer of the multilayer board and a chip resistor is arranged on an outer surface of the multilayer board. The power divider/combiner includes vias, which connect the strip co…
Who is the assignee on this patent?
Mitsubishi Electric Corp
What technology area does this patent fall under?
Primary CPC classification H01P5/19. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 23 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).