Schottky barrier diode and method of manufacturing the same

US10930797B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10930797-B2
Application numberUS-201615374468-A
CountryUS
Kind codeB2
Filing dateDec 9, 2016
Priority dateJul 5, 2016
Publication dateFeb 23, 2021
Grant dateFeb 23, 2021

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A Schottky barrier diode includes: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a p+ type region and a p type region disposed on the n− type layer and separated from each other; an anode disposed on the n− type layer, the p+ type region, and the p type region; and a cathode disposed on a second surface of the n+ type silicon carbide substrate. The p type region is in plural, has a hexagonal shape on the plane, and is arranged in a matrix shape, and the n− type layer disposed between the p+ type region and the p type region has a hexagonal shape on the plane and encloses the p type region.

First claim

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What is claimed is: 1. A Schottky barrier diode comprising: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a p+ type region and a plurality of p type regions disposed on the n− type layer; an anode disposed on the n− type layer, the p+ type region, and the plurality of p type regions; and a cathode disposed on a second surface of the n+ type silicon carbide substrate, wherein each of the plurality of p type regions has a hexagonal shape on a plane, and the plurality of p type regions are arranged in a matrix shape on the plane, on the plane: the n− type layer comprises a plurality of hexagonal shape portions that are spaced apart from each other and that are disposed between the p+ type region and the plurality of p type regions, the p+ type region is disposed between the plurality of hexagonal shape portions of the n− type layer, and the plurality of hexagonal shape portions of the n− type layer enclose the plurality of p type regions, respectively, on the plane: the p+ type region is an entirely continuous region completely surrounding the plurality of hexagonal shape portions, the p+ type region and the plurality of p type regions respectively contact the n− type layer, and on the plane: an area where the p+ type region and the n− type layer contact each other is wider than an area where the plurality of p type regions and the n− type layer contact each other. 2. The Schottky barrier diode of claim 1 , wherein a horizontal line, which passes through a center point of each of the plurality of p type regions, does not meet a horizontal line of each of the plurality of p type regions that is adjacent thereto in a column direction on the plane. 3. The Schottky barrier diode of claim 1 , wherein an ion doping concentration of the p+ type region is higher than an ion doping concentration of the plurality of p type regions. 4. The Schottky barrier diode of claim 3 , wherein the anode includes a Schottky electrode, and the cathode includes an ohmic electrode. 5. The Schottky barrier diode of claim 4 , further comprising: an n type layer disposed between the anode and the n− type layer, and the ion doping concentration of the n type layer is higher than the ion doping concentration of the n− type layer. 6. The Schottky barrier diode of claim 5 , further comprising a first trench and a second trench disposed on the n type layer, the first trench and the second trench separated from each other. 7. The Schottky barrier diode of claim 6 , wherein the p+ type region is disposed under a bottom surface of the first trench, and each of the plurality of p type regions is disposed under the bottom surface of the second trench. 8. The Schottky barrier diode of claim 7 , wherein the anode includes: a first anode disposed inside the first trench and the second trench, and a second anode disposed on the first anode and the n type layer. 9. A Schottky barrier diode comprising: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a single p+ type region disposed on the n− type layer; a plurality of p type regions disposed on the n− type layer and dispersed in the single p+ type region; an anode disposed on the n− type layer, the single p+ type region, and the plurality of p type regions; and a cathode disposed on a second surface of the n+ type silicon carbide substrate, wherein each of the plurality of p type regions has a hexagonal shape on a plane, and the plurality of p type regions are arranged in a matrix shape on the plane, on the plane: the n− type layer comprises a plurality of hexagonal shape portions that are spaced apart from each other and that are disposed between the single p+ type region and the plurality of p type regions, the single p+ type region is disposed between the plurality of hexagonal shape portions of the n− type layer, and the plurality of hexagonal shape portions of the n− type layer enclose the plurality of p type regions, respectively, on the plane: the single p+ type region completely surrounds the plurality of hexagonal shape portions, the single p+ type region and the plurality of p type regions respectively contact the n− type layer, and on the plane: an area where the single p+ type region and the n− type layer contact each other is wider than an area where the plurality of p type regions and the n− type layer contact each other. 10. The Schottky barrier diode of claim 9 , wherein a horizontal line, which passes through a center point of each of the plurality of p type regions, does not meet a horizontal line of each of the plurality of p type regions that is adjacent thereto in a column direction on the plane.

Assignees

Inventors

Classifications

  • into crystalline silicon carbide · CPC title

  • of electrically active species · CPC title

  • of Schottky diodes · CPC title

  • Electrodes comprising a Schottky barrier to a semiconductor · CPC title

  • Silicon carbide · CPC title

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What does patent US10930797B2 cover?
A Schottky barrier diode includes: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a p+ type region and a p type region disposed on the n− type layer and separated from each other; an anode disposed on the n− type layer, the p+ type region, and the p type region; and a cathode disposed on a second surface of the n+ type silicon carbide substrate. The p type…
Who is the assignee on this patent?
Hyundai Motor Co Ltd, Hyundai Motor Company Ltd
What technology area does this patent fall under?
Primary CPC classification H10D8/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 23 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).