Thin film transistor, manufacturing method, array substrate, display panel, and device

Patent metadata

Field	Value
Publication number	US-10930786-B2
Application number	US-201916554657-A
Country	US
Kind code	B2
Filing date	Aug 29, 2019
Priority date	Dec 6, 2017
Publication date	Feb 23, 2021
Grant date	Feb 23, 2021

Abstract

A thin film transistor (TFT), a manufacturing method, an array substrate, a display panel, and a device is disclosed. The TFT includes a hydrogen-containing buffer layer located on a substrate; an oxide semiconductor layer located on the buffer layer, wherein the oxide semiconductor layer includes a conductor region and a semiconductor region; a source or drain located on the conductor region, and electrically connected to the conductor region; and a gate structure located on the semiconductor region.

First claim

What is claimed is:

1. A method for manufacturing a thin film transistor, comprising:
forming a hydrogen-containing buffer layer on a substrate;
forming an oxide semiconductor layer on the buffer layer;
allowing hydrogen in the buffer layer to enter into a portion of the oxide semiconductor layer such that the oxide semiconductor layer is plasmon activated, a plasmon generated oxide semiconductor layer being formed as a conductor region, and a plasmon non-generated oxide semiconductor layer being formed as a semiconductor region;
forming a source or drain on the conductor region, the source or drain being electrically connected to the conductor region; and
forming a gate structure on the semiconductor region,
wherein,
the forming a hydrogen-containing buffer layer on a substrate comprises:
forming a hydrogen-free buffer layer on the substrate,
forming a patterned photoresist on the hydrogen-free buffer layer,
performing a hydrogen injection treatment on the buffer layer which is not covered by a photoresist to obtain a first hydrogen-containing region, the buffer layer covered by the photoresist being formed as a second hydrogen-free region; and
removing the photoresist.

2. The method according to claim 1 , wherein before the oxide semiconductor layer is formed, the method further comprises:
forming a patterned blocking layer on the buffer layer, wherein the blocking layer blocks hydrogen in the buffer layer from entering into the oxide semiconductor layer.

3. The method according to claim 1 , wherein a content of hydrogen in the buffer layer is selected based on a thickness of the oxide semiconductor layer.

4. The method according to claim 1 , wherein allowing hydrogen in the buffer layer to enter into a portion of the oxide semiconductor layer such that the oxide semiconductor layer is plasmon activated comprises thermal treating the buffer layer.

5. A method for manufacturing a thin film transistor, comprising:
forming a hydrogen-containing buffer layer on a substrate;
forming an oxide semiconductor layer on the buffer layer;
allowing hydrogen in the buffer layer to enter into a portion of the oxide semiconductor layer such that the oxide semiconductor layer is a plasmon activated, a plasmon generated oxide semiconductor layer being formed as a conductor region, and a plasmon on-generated oxide semiconductor layer being formed as a semiconductor region;
forming a source or drain on the conductor region, the source or drain being electrically connected to the conductor region; and
forming a gate structure on the semiconductor region,
wherein,
the forming a hydrogen-containing buffer layer on a substrate comprises:
forming a hydrogen-free material layer on the substrate;
forming an opening in the hydrogen-free material layer to expose the substrate;
forming a hydrogen-containing material layer in the opening;
planarizing in such a manner that surfaces away from the substrate of the hydrogen-free material layer and the hydrogen-containing material layer are aligned with each other, wherein the hydrogen-containing material layer is formed as a first region, and the hydrogen-free material layer is formed into a second region.

6. The method according to claim 5 , wherein before the oxide semiconductor layer is formed, the method further comprises:
forming a patterned blocking layer on the buffer layer, wherein the blocking layer blocks hydrogen in the buffer layer from entering into the oxide semiconductor layer.

7. The method according to claim 5 , wherein a content of hydrogen in the buffer layer is selected based on a thickness of the oxide semiconductor layer.

8. The method according to claim 5 , wherein allowing hydrogen in the buffer layer to enter into a portion of the oxide semiconductor layer such that the oxide semiconductor layer is plasmon activated comprises thermal treating the buffer layers.

Assignees

• Boe Technology Group Co Ltd
• Hefei Xinsheng Optoelectronics Technology Co Ltd

Inventors

• Ding Yuankui
• Zhao Ce
• Yuan Guangcai
• Hu Yingbin
• Cheng Leilei
• Cheng Jun
• Zhou Bin

Classifications

• H10D99/00 Primary

  Subject matter not provided for in other groups of this subclass · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10D86/0231

  using masks, e.g. half-tone masks · CPC title

• H10D86/0221

  comprising manufacture, treatment or patterning of TFT semiconductor bodies · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title