Display apparatus

US10930680B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10930680-B2
Application numberUS-201916248446-A
CountryUS
Kind codeB2
Filing dateJan 15, 2019
Priority dateJan 16, 2018
Publication dateFeb 23, 2021
Grant dateFeb 23, 2021

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A display apparatus includes a substrate, a display unit, a pad portion, and a connection wire. The display unit is on the substrate. The display unit includes a pixel circuit and a display device electrically connected to the pixel circuit. The pad portion is at one side of a peripheral area outside the display unit. The pad portion includes a first conductive layer, a second conductive layer arranged on and electrically connected to the first conductive layer, and a third conductive layer arranged on and electrically connected to the second conductive layer. The connection wire connects the pad portion and the display unit to each other to transmit a signal input to the pad portion to the display device. The connection wire includes a same material as that of the first conductive layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A display apparatus comprising: a substrate; a display unit on the substrate, the display unit comprising a pixel circuit and a display device electrically connected to the pixel circuit; a pad portion at one side of a peripheral area outside the display unit, the pad portion comprising: a first conductive layer; a first insulating layer arranged on the first conductive layer, the first insulating layer comprising a first contact hole; a second conductive layer arranged on and electrically connected to the first conductive layer via the first contact hole; a second insulating layer arranged on the second conductive layer, the second insulating layer comprising a second contact hole; and a third conductive layer arranged on and electrically connected to the second conductive layer via the second contact hole; and a connection wire connecting the pad portion and the display unit to each other to transmit a signal input from the pad portion to the display device, the connection wire comprising a same material as that of the first conductive layer, wherein the pixel circuit comprises: a thin film transistor comprising: a semiconductor layer; and a first gate electrode at least partially overlapping the semiconductor layer; a first wiring layer, the first gate electrode being between the first wiring layer and the substrate; and a second wiring layer, the first wiring layer being between the second wiring layer and the first gate electrode. 2. The display apparatus of claim 1 , wherein the connection wire is configured to transmit a data signal input from the pad portion to the display device. 3. The display apparatus of claim 1 , wherein the first conductive layer comprises a same material as that of the first gate electrode. 4. The display apparatus of claim 1 , wherein the second conductive layer comprises a same material as that of the first wiring layer. 5. The display apparatus of claim 1 , wherein the third conductive layer comprises a same material as that of the second wiring layer. 6. The display apparatus of claim 1 , wherein the first conductive layer and the second conductive layer are in contact with one another via the first contact hole. 7. The display apparatus of claim 6 , wherein, on a plane, an area of the first contact hole is 10% to 30% of that of the third conductive layer. 8. The display apparatus of claim 6 , wherein the second conductive layer and the third conductive layer are in contact with one another via the second contact hole. 9. The display apparatus of claim 8 , wherein, on a plane, an area of the second contact hole is 70% to 90% of that of the third conductive layer. 10. The display apparatus of claim 8 , wherein, on a plane, an area of the first contact hole is one fourth of that of the second contact hole. 11. The display apparatus of claim 1 , wherein: the pixel circuit further comprises a second gate electrode between the first gate electrode and the first wiring layer; and the first conductive layer comprises a same material as that of the second gate electrode. 12. The display apparatus of claim 1 , further comprising: a printed circuit board electrically connected to the pad portion. 13. A display apparatus comprising: a substrate comprising a display area and a peripheral area outside the display area; a display unit on the display area of the substrate, the display unit comprising a pixel circuit and a display device electrically connected to the pixel circuit, the pixel circuit comprising: a thin film transistor comprising a semiconductor layer, a gate electrode, and a gate insulating layer between the semiconductor layer and the gate electrode; a first wiring layer, the gate electrode being between the first wiring layer and the substrate; and a second wiring layer, the first wiring layer being between the second wiring layer and the gate electrode; a connection wire electrically connected to the pixel circuit and extending towards the peripheral area; and a pad portion at one side of the peripheral area of the substrate, the pad portion being configured to transmit a signal to the display device via the connection wire, the pad portion comprising: a first conductive layer comprising a same material as that of the gate electrode, the gate insulating layer being stacked between the first conductive layer and the substrate; a second conductive layer at least partially overlapping the first conductive layer, the second conductive layer comprising a same material as that of the first wiring layer; a third conductive layer exposed to the outside and at least partially overlapping the second conductive layer, the third conductive layer comprising a same material as that of the second wiring layer; a first insulating layer between the first conductive layer and the second conductive layer, the first insulating layer comprising at least one first contact hole, the first conductive layer and the second conductive layer being in contact with one another via the first contact hole; and a second insulating layer between the second conductive layer and the third conductive layer, the second insulating layer comprising at least one second contact hole, the second conductive layer and the third conductive layer being in contact with one another via the second contact hole. 14. The display apparatus of claim 13 , wherein the connection wire comprises a same material as that of the gate electrode. 15. The display apparatus of claim 13 , wherein the first contact hole and the second contact hole do not overlap each other on a plane. 16. The display apparatus of claim 13 , wherein, on a plane, an area of the first contact hole is one fourth of that of the second contact hole. 17. The display apparatus of claim 13 , wherein the connection wire is configured to transmit a data signal input from the pad portion to the display device. 18. The display apparatus of claim 13 , further comprising: a printed circuit board contacting the third conductive layer and electrically connected to the pad portion.

Assignees

Inventors

Classifications

  • Multi-gate TFTs · CPC title

  • characterised by the active materials · CPC title

  • integrated with passive devices, e.g. auxiliary capacitors · CPC title

  • H10D86/441Primary

    Interconnections, e.g. scanning lines · CPC title

  • H10D86/60Primary

    wherein the TFTs are in active matrices · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10930680B2 cover?
A display apparatus includes a substrate, a display unit, a pad portion, and a connection wire. The display unit is on the substrate. The display unit includes a pixel circuit and a display device electrically connected to the pixel circuit. The pad portion is at one side of a peripheral area outside the display unit. The pad portion includes a first conductive layer, a second conductive layer …
Who is the assignee on this patent?
Samsung Display Co Ltd, Samsung Disploy Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D86/441. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 23 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).