Electronic device comprising a discrete transistor assembled on a printed circuit board

US10930606B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10930606-B2
Application numberUS-201916449405-A
CountryUS
Kind codeB2
Filing dateJun 23, 2019
Priority dateJun 25, 2018
Publication dateFeb 23, 2021
Grant dateFeb 23, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An electronic device including: a discrete transistor including a semiconductor chip encapsulated in a package made of an insulating material leaving access to a first pad of connection to a first conduction terminal of the transistor; and a printed circuit board (320) including first (125) and second (129) separate connection pads, wherein the transistor is assembled on the printed circuit board so that the first connection pad (105) of the transistor is in contact with the first (125) and second (129) connection pads of the printed circuit board.

First claim

Opening claim text (preview).

What is claimed is: 1. An electronic device comprising: a discrete transistor comprising a semiconductor chip encapsulated in a package made of an insulating material leaving access to a first pad of connection to a first conduction terminal of the transistor, a second pad of connection to a second conduction terminal of the transistor, and a third pad of connection to a control terminal of the transistor; and a printed circuit board comprising first, second, third, and fourth separate connection pads, wherein the transistor is assembled on the printed circuit board so that the first pad of connection of the transistor is in contact with the first and second connection pads of the printed circuit board and that the second and third pads of connection of the transistor are respectively in contact with the third and fourth connection pads of the printed circuit board; the device further comprises, assembled on the printed circuit board, a circuit of control of the transistor, connected to the control terminal of the transistor via the fourth connection pad of the printed circuit board and to the first conduction terminal of the transistor via the second connection pad of the printed circuit board; and the first connection pad of the printed circuit board is connected to a power terminal of the electronic device. 2. The device of claim 1 , wherein the circuit of control is configured to alternately switch the transistor to the off state and to the on state at a frequency greater than 10 kHz. 3. The device of claim 1 , wherein, in top view, a distance between the second connection pad of the printed circuit board and the fourth connection pad of the printed circuit board is shorter than one tenth of a largest dimensions of the transistor. 4. The device of claim 1 , wherein: the printed circuit board further comprises a fifth connection pad separate from the first and second connection pads of the printed circuit board; and the transistor is assembled on the printed circuit board so that the first pad of connection of the transistor is in contact with the first, second, and fifth connection pads of the printed circuit board. 5. The device of claim 1 , wherein the first, second, third, and fourth connection pads are made of metal. 6. The device of claim 1 , wherein the first, second, third, and fourth connection pads are made of copper. 7. The device of claim 1 , wherein the transistor is a MOS transistor, the first conduction terminal being a source terminal of the transistor. 8. The device of claim 1 , wherein the transistor is a MOS transistor, the first conduction terminal being a source terminal of the transistor, and wherein the second conduction terminal and the control terminal are respectively a drain terminal and a gate terminal of the transistor. 9. The device of claim 1 , wherein the transistor is a gallium nitride transistor, a silicon carbide MOS transistor, or a silicon superjunction MOS transistor.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • by a substrate and the encapsulations · CPC title

  • Conductive materials thereof · CPC title

  • H10W90/701Primary

    characterised by the relative positions of pads or connectors relative to package parts · CPC title

  • Manufacturing or production processes characterised by the final manufactured product · CPC title

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What does patent US10930606B2 cover?
An electronic device including: a discrete transistor including a semiconductor chip encapsulated in a package made of an insulating material leaving access to a first pad of connection to a first conduction terminal of the transistor; and a printed circuit board (320) including first (125) and second (129) separate connection pads, wherein the transistor is assembled on the printed circuit boa…
Who is the assignee on this patent?
Commissariat Energie Atomique, Renault Sas
What technology area does this patent fall under?
Primary CPC classification H10W90/701. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 23 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).