Symmetric bipolar switching in memristors for artificial intelligence hardware

US10930343B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10930343-B2
Application numberUS-201816107063-A
CountryUS
Kind codeB2
Filing dateAug 21, 2018
Priority dateAug 21, 2018
Publication dateFeb 23, 2021
Grant dateFeb 23, 2021

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  1. Title

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  5. First independent claim

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Abstract

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A memristor device includes a first electrode, a second electrode, and a memristor layer disposed between the first electrode and the second electrode. The memristor layer is formed of a metal oxide. The memristor layer includes a plurality of regions that extend between the first electrode and the second electrode. The plurality of regions of the memristor layer are created with different concentrations of oxygen before electrical operation, and, during electrical operation, a voltage-conductance characteristic of the memristor device is controlled based on the different concentrations of oxygen of the plurality of regions. The controlling of the voltage-conductance characteristic includes increasing or decreasing the conductance of the memristor device toward a target conductance at a specific voltage.

First claim

Opening claim text (preview).

The invention claimed is: 1. A memristor device comprising: a first electrode; a second electrode; and a memristor layer formed of a metal oxide and disposed between the first electrode and the second electrode, wherein the memristor layer includes a plurality of regions that extend between the first electrode and the second electrode, wherein the plurality of regions comprises a center region, a first surrounding region, and a second surrounding region, wherein a first oxygen concentration of the center region is lower than the first surrounding region, and a second oxygen concentration of the first surrounding region is lower than the second surrounding region before electrical operation, wherein, during electrical operation, a voltage-conductance characteristic of the memristor device is controlled based on the first oxygen concentration and the second oxygen concentration of the plurality of regions, and wherein the controlling of the voltage-conductance characteristic including increasing or decreasing the conductance of the memristor device toward a target conductance at a specific voltage. 2. The memristor device of claim 1 , wherein the controlling of the voltage-conductance characteristic includes increasing or decreasing the conductance of the memristor device toward a plurality of target conductances in a voltage range. 3. The memristor device of claim 2 , wherein the voltage-conductance characteristic indicates a voltage-conductance relationship between the voltage and the conductance of the memristor device, and wherein the controlling of the voltage-conductance characteristic causes the voltage-conductance relationship to become linear or more linear in the voltage range. 4. The memristor device of claim 3 , wherein the voltage-conductance relationship becomes more linear as compared with (i) the voltage-conductance relationship of the memristor device prior to the controlling of the voltage-conductance characteristic, or (ii) a voltage-conductance relationship of an otherwise comparable memristor device having a metal-oxide memristor layer with a uniform concentration of oxygen or a more uniform concentration of oxygen. 5. The memristor device of claim 1 , wherein the plurality of regions of the memristor layer are created with different concentrations of a dopant before electrical operation, and, during electrical operation, a voltage-conductance characteristic of the memristor device is controlled based on the different concentrations of the dopant of the plurality of regions. 6. The memristor device of claim 1 , wherein the plurality of regions of the memristor layer are concentric regions. 7. The method of claim 1 , wherein the first surrounding region and the second surrounding region comprise the metal oxide at different concentrations of one or more ingredients. 8. The method of claim 1 , wherein the plurality of regions is fewer than five. 9. A memristor-based computing apparatus comprising: an array of pillar electrodes arranged in a first direction and a second direction, each of the pillar electrodes extending in a third direction; an array of word lines arranged in the first direction and the third direction, each of the word lines extending in the second direction; and a plurality of memristor cells formed at cross points of the pillar electrodes and the word lines around the pillar electrode, wherein each of the memristor cells includes a plurality of regions formed between one of the pillar electrodes and one of the word lines, wherein the plurality of regions comprises a center region, a first surrounding region, and a second surrounding region, wherein a first oxygen concentration of the center region is lower than the first surrounding region, and a second oxygen concentration of the first surrounding region is lower than the second surrounding region before electrical operation, and wherein, during electrical operation, a voltage-conductance characteristic of each of the memristor cells is controlled based on the first oxygen concentration and the second oxygen concentration of the plurality of regions, and the controlling of the voltage-conductance characteristic including increasing or decreasing the conductances of the memristor cells toward a target conductance at a specific voltage. 10. The memristor-based computing apparatus of claim 9 , wherein the controlling of the voltage-conductance characteristic includes increasing or decreasing the conductances of the memristor cells toward a plurality of target conductances in a voltage range. 11. The memristor-based computing apparatus of claim 10 , wherein wherein the voltage-conductance characteristic indicates a voltage-conductance relationship between the voltage and the conductance of the memristor cells, and wherein the controlling of the voltage-conductance characteristic causes the voltage-conductance relationship to become linear or more linear in the voltage range. 12. The memristor-based computing apparatus of claim 11 , wherein the voltage-conductance relationship becomes more linear as compared with (i) the voltage-conductance relationship of the memristor cells prior to the controlling of the voltage-conductance characteristic, or (ii) a voltage-conductance relationship of an otherwise comparable memristor cell having a metal-oxide memristor layer with a uniform concentration of oxygen or a more uniform concentration of oxygen. 13. The memristor-based computing apparatus of claim 9 , wherein the plurality of regions of each of the memristor cells are created with different concentrations of a dopant before electrical operation, and, during electrical operation, a voltage-conductance characteristic of the memristor cell is controlled based on the different concentrations of the dopant of the plurality of regions. 14. The memristor-based computing apparatus of claim 9 , further comprising: a control circuit configured to perform a matrix-matrix or vector-matrix multiplication by programming data in at least a part of the memristor cells. 15. A method for manufacturing a memristor device comprising: forming a first electrode; forming a metal oxide layer on the first electrode; forming a first mask on a first region of the metal oxide layer to be formed as a memristor layer, and introducing oxygen to a second region of the metal oxide layer not covered by the first mask; forming a second mask on the second region and a third region within the first region, and introducing oxygen to a fourth region of the metal oxide layer not covered by the second mask, such that a voltage-conductance characteristic of the memristor device during electrical operation is controlled based on different concentrations of oxygen of the third and fourth regions, the controlling of the voltage-conductance characteristic including increasing or decreasing the conductance of the memristor device toward a target conductance at a specific voltage; and forming a second electrode on the metal oxide layer. 16. The method of claim 15 , wherein the controlling of the voltage-conductance characteristic includes increasing or decreasing the conductance of the memristor device toward a plurality of target conductances in a voltage range. 17. The method of claim 16 , wherein the voltage-conductance characteristic indicates a voltage-conductance relationship between the voltage and the conductance of the memristor device, and wherein the controlling of the voltage-conductance characteristic causes the voltage-conductance relationship to become linear or more linear in the voltage range.

Assignees

Inventors

Classifications

  • comprising metal oxide memory material, e.g. perovskites · CPC title

  • Write to perform initialising, forming process, electro forming or conditioning · CPC title

  • Word line organisation; Word line lay-out · CPC title

  • Cell access · CPC title

  • Three dimensional array · CPC title

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What does patent US10930343B2 cover?
A memristor device includes a first electrode, a second electrode, and a memristor layer disposed between the first electrode and the second electrode. The memristor layer is formed of a metal oxide. The memristor layer includes a plurality of regions that extend between the first electrode and the second electrode. The plurality of regions of the memristor layer are created with different conc…
Who is the assignee on this patent?
Hewlett Packard Entpr Dev Lp
What technology area does this patent fall under?
Primary CPC classification G11C13/0007. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 23 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).