High speed processing of financial information using FPGA devices
US-9582831-B2 · Feb 28, 2017 · US
US10929930B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10929930-B2 |
| Application number | US-201816111530-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 24, 2018 |
| Priority date | Dec 15, 2008 |
| Publication date | Feb 23, 2021 |
| Grant date | Feb 23, 2021 |
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A variety of embodiments for hardware-accelerating the processing of financial market depth data are disclosed. A coprocessor, which may be resident in a ticker plant, can be configured to update order books based on financial market depth data at extremely low latency. Such a coprocessor can also be configured to enrich a stream of limit order events pertaining to financial instruments with data from a plurality of updated order books.
Opening claim text (preview).
What is claimed is: 1. A system for applying specific computer technology to reduce latency and increase throughput with respect to updating a plurality of order books from financial market depth data, the system comprising: a memory for storing a plurality of data structures that represent a plurality of independent sets of order records for a plurality of financial instruments, the order records comprising (1) a plurality of limit order records representative of a plurality of limit orders for a plurality of financial instruments and (2) a plurality of price point records for a plurality of the limit orders; and a member of the group consisting of a reconfigurable logic device, a graphics processing unit (GPU), and a chip multi-processor (CMP), the member configured to (1) receive a plurality of limit order events, each limit order event pertaining to a limit order for a financial instrument on an exchange and comprising a plurality of data fields and (2) process a plurality of the limit order events to build and update the limit order records and the price point records independently within the data structures based on the processed limit order events; wherein the member comprises a first processing engine and a second processing engine; wherein the first processing engine is configured to generate a plurality of updates for the limit order records in the memory based on the limit order events; wherein the second processing engine is configured to generate a plurality of updates for the price point records in the memory based on the limit order events; and wherein the first and second processing engines are configured to perform their respective operations in parallel with each other. 2. The system of claim 1 wherein the first and second processing engines are configured to interleave accesses to the memory to update the limit order records and the price point records. 3. The system of claim 1 wherein the member is resident within a ticker plant, the ticker plant also including a processor, and wherein the member is configured to serve as an offload engine relative to the processor. 4. The system of claim 3 further comprising: a trading application configured to (1) access a plurality of the updated order records and a plurality of the updated price point records via the ticker plant and (2) generate a plurality of financial instrument trade orders based on the accessed order records. 5. The system of claim 1 wherein the first processing engine comprises an order engine, wherein the second processing engine comprises a price engine; wherein the order engine is configured to identify a plurality of adds, modifies, and deletes with respect to a plurality of limit order records based on the limit order events for updating the limit order records in the memory; wherein the price engine is configured to aggregate a plurality of adds, modifies, and deletes at a plurality of price levels with respect to a plurality of price point records based on the limit order events for updating the price point records in the memory; and wherein the order engine and the price engine are configured to perform their respective operations in parallel with each other. 6. The system of claim 5 wherein the memory comprises a single physical memory in which the limit order records and the price point records are stored. 7. The system of claim 6 wherein the order engine and the price engine are further configured to interleave their accesses to the single physical memory. 8. The system of claim 5 wherein the memory comprises a first physical memory in which the limit order records are stored and a second physical memory in which the price point records are stored. 9. The system of claim 8 wherein the order engine and the price engine are further configured to interleave their accesses to the first and second physical memories. 10. The system of claim 5 wherein the price point records comprise a plurality of regional price point records and a plurality of composite price point records, each regional price point record being representative of an aggregation of limit orders for a financial instrument at a particular price on a given exchange, each composite price point record being representative of an aggregation of limit orders for a financial instrument at a particular price across a plurality of different exchanges. 11. The system of claim 5 wherein a plurality of the limit order records are stored in the memory as a first hash table, wherein a plurality of the price point records are stored in the memory as a second hash table, and wherein the member further comprises an order hash component upstream from the order engine and a price hash component upstream from the price engine; wherein the order hash component is configured to generate a first hash key for a limit order event from an order reference number field or a symbol identifier field of the limit order event; wherein the order engine is further configured to locate a limit order record in the first hash table based on the generated first hash key; wherein the price hash component is configured to generate a second hash key for a limit order event from a symbol identifier field, a global exchange identifier field, and a price field of the limit order event; and wherein the price engine is further configured to locate a price point record in the second hash table based on the generated second hash key. 12. The system of claim 11 wherein the price point records comprise a plurality of regional price point records and a plurality of composite price point records, each regional price point record being representative of an aggregation of limit orders for a financial instrument at a particular price on a given exchange, each composite price point record being representative of an aggregation of limit orders for a financial instrument at a particular price across a plurality of different exchanges. 13. The system of claim 5 wherein the memory is external to the member; wherein the member is further configured to (1) cache a plurality of accessed limit order records and a plurality of accessed price point records in an on-chip memory cache and (2) track which limit order records and which price point records are cached in the on-chip memory cache; wherein the order engine is further configured to (1) receive limit order event data pertaining to a cached limit order record and (2) based on the tracking of which limit order records are cached in the on-chip memory cache, access the limit order records pertaining to a cached limit order record via the on-chip memory cache rather than the external memory; and wherein the price engine is further configured to (1) receive limit order event data pertaining to a cached price point record and (2) based on the tracking of which price point records are cached in the on-chip memory cache, access the price point records pertaining to a cached price point record via the on-chip memory cache rather than the external memory. 14. The system of claim 13 wherein the on-chip memory cache comprises a first on-chip memory cache and a second on-chip memory cache; wherein the member is further configured to (1) cache a plurality of the accessed limit order records in the first on-chip memory cache, (2) cache a plurality of the accessed price point records in the second on-chip memory cache, (3) track which limit order records are cached in the first on-chip memory cache, and (4) track which price point records are cached in the second on-chip memory cache; wherein the order engine is further configured to, based on the tracking of which limit order records ar
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