Service chaining hardware accelerators within a data stream processing integrated circuit

Patent metadata

Field	Value
Publication number	US-10929175-B2
Application number	US-201816198607-A
Country	US
Kind code	B2
Filing date	Nov 21, 2018
Priority date	Nov 21, 2018
Publication date	Feb 23, 2021
Grant date	Feb 23, 2021

Abstract

This disclosure describes techniques that include establishing a service chain of operations that are performed on a network packet as a sequence of operations. In one example, this disclosure describes a method that includes storing, by a data processing unit integrated circuit, a plurality of work unit frames in a work unit stack representing a plurality of service chain operations, including a first service chain operation, a second service chain operation, and a third service chain operation; executing, by the data processing unit integrated circuit, the first service chain operation, wherein executing the first service chain operation generates operation data; determining, by the data processing unit integrated circuit and based on the operation data, whether to perform the second service chain operation; and executing, by the data processing unit integrated circuit, the third service chain operation after skipping the second service chain operation.

First claim

What is claimed is:

1. A data processing unit integrated circuit comprising:
a plurality of processing cores, each of the cores configured to execute one or more of a plurality of software work unit handlers;
an accelerator unit, implemented in circuitry, configured to execute one or more data processing operations; and
a memory configured to store a plurality of work units arranged as a work unit stack, each of the work units associated with a network packet, each work unit specifying one of the plurality of software work unit handlers for processing the network packet and specifying one of the cores for executing the specified software work unit handler, and at least one of the plurality of work units specifying one of the data processing operations to be performed by the accelerator unit, wherein the work unit stack specifies a set of service chain operations to be performed on the network packet, and wherein the set of operations include:
processing the network packet by the plurality of software work unit handlers by executing run-to-completion software handlers invoked on a data plane operating system on at least one of the plurality of processing cores, and
performing the one of the data processing operations.

2. The data processing unit integrated circuit of claim 1 , wherein the plurality of processing cores includes a first processing core, wherein the plurality of work units includes a first work unit specifying a first software work unit handler, the first work unit further specifying the first processing core for executing the first software work unit handler, and wherein to execute the service chain of operations, the data processing unit integrated circuit is configured to:
cause the first processing core to execute the first software work unit handler.

3. The data processing unit integrated circuit of claim 2 , wherein executing the first software work unit handler generates handler data, and wherein to execute the service chain of operations, the data processing unit integrated circuit is further configured to:
determine, based on the handler data, whether to cause the accelerator unit to perform the data processing operation.

4. The data processing unit of claim 3 , wherein determining whether to cause the accelerator unit to perform the data processing operation includes:
determining an error occurred when executing the first software work unit handler, and
terminating the set of service chain operations based on the error.

5. The data processing unit of claim 3 , wherein determining whether to cause the accelerator unit to perform the data processing operation includes:
inserting an additional operation into the service chain of operations, wherein the additional operation is scheduled to be performed before the data processing operation.

6. The data processing unit integrated circuit of claim 3 , wherein to execute the service chain of operations, the data processing unit integrated circuit is further configured to:
cause the accelerator unit to perform the data processing operation.

7. The data processing unit integrated circuit of claim 6 , wherein the accelerator unit includes a scheduler for prioritizing data processing operations performed by the accelerator, and wherein causing the accelerator unit to perform the data processing operation includes:
queueing, by the scheduler, the data processing operation to be performed by the accelerator.

8. The data processing unit integrated circuit of claim 7 , wherein causing the accelerator to perform the data processing operation includes:
determining information about processing requirements for the network packet; and
processing, based on the information about the processing requirements of the network packet, the network packet using one or more of a plurality of threads within the accelerator unit.

9. The data processing unit integrated circuit of claim 7 , wherein the accelerator unit includes a plurality of accelerator devices, and causing the accelerator to perform the data processing operation includes:
determining information about processing requirements for the network packet; and
processing, based on the information about the processing requirements of the network packet, the network packet using each of the plurality of accelerator devices.

10. The data processing unit integrated circuit of claim 9 , wherein processing the network packet using each of the plurality of accelerator devices includes:
coordinating a processing order by which the plurality of accelerator devices processes the network packet.

11. The data processing unit integrated circuit of claim 9 , wherein determining information about processing requirements for the network packet includes:
identifying a time-consuming service chain operation from among the set of service chain operations, and
determining an appropriate number of accelerator devices to process the time-consuming service chain operation.

12. The data processing unit integrated circuit of claim 2 , wherein performing the one of the data processing operations generates accelerator data, and wherein to execute the service chain of operations, the data processing unit integrated circuit is further configured to:
determine, based on the accelerator data, whether to perform an additional operation.

13. The method of claim 12 , wherein the additional operation is at least one of:
executing another software work unit handler, and
performing another data processing operation.

14. The data processing unit of claim 12 , wherein determining whether to perform the additional operation includes:
determining an error occurred when performing the one of the data processing operations, and terminating the set of service chain operations based on the error.

15. The data processing unit of claim 12 , wherein determining whether to perform the additional operation includes:
inserting a further operation into the service chain of operations, wherein the further operation is scheduled to be performed before executing the additional operation.

16. The data processing unit integrated circuit of claim 2 , wherein the plurality of processing cores includes a second processing core, wherein executing the first software work unit handler generates handler data, and wherein to execute the service chain of operations, the data processing unit integrated circuit is further configured to:
determine, based on the handler data, whether to cause the second processing core to execute a second software work unit handler after the first processing core executes the first software work unit handler.

17. The data processing unit integrated circuit of claim 16 , wherein to execute the service chain of operations, the data processing unit integrated circuit is further configured to:
cause the second processing core to execute the second software work unit handler.

18. The data processing unit integrated circuit of claim 2 , further comprising:
a networking unit configured to manage input and output of data between a network and the data processing unit integrated circuit; and
a host unit configured to manage input and output of data between a host and the data processing unit integrated circuit.

19. The data processing unit integrated circuit of claim 18 , wherein to execute the service chain of operations, the data processing unit integrated circuit is further configured to:
receive, by the networking unit, a network packet over the network; and
cause the networking unit to process the network packet.

Assignees

• Fungible Inc

Inventors

• Goyal Rajan
• Billa Satyanarayana Lakshmipathi

Classifications

• G06F9/4843 Primary

  by program, e.g. task dispatcher, supervisor, operating system · CPC title

• G06F2209/503

  Resource availability · CPC title

• G06F9/5027

  the resource being a machine, e.g. CPUs, Servers, Terminals · CPC title

• G06F2209/501

  Performance criteria · CPC title

• G06F2209/483

  Multiproc · CPC title