Network interface device with dynamic noise conditioning
US-10085067-B2 · Sep 25, 2018 · US
US10924138B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10924138-B2 |
| Application number | US-201916562816-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 6, 2019 |
| Priority date | Jan 29, 2016 |
| Publication date | Feb 16, 2021 |
| Grant date | Feb 16, 2021 |
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A noise mitigation device includes a signal processing unit positioned within a signal path. The signal processing unit is configured to determine a power level of the signal path at a first time and a second time. The signal processing unit is also configured to determine a dynamic noise threshold based on the power level at the first time and at the second time. The signal processing unit is also configured to store the dynamic noise threshold for a predetermined time period that is longer than a time between the first time and the second time. The signal processing unit is also configured to actuate a switch in the signal path into a first state when the power level exceeds the dynamic noise threshold. The signal processing unit is also configured to actuate a switch in the signal path into a second state when the power level does not exceed the dynamic noise threshold.
Opening claim text (preview).
What is claimed is: 1. A system for dynamically mitigating ingress signal noise returned to a source from a local device at a premises, the system comprising: a first diplexer configured to connect to the source; a second diplexer configured to connect to the local device; a forward signal path electrically connecting the first diplexer and the second diplexer, and configured to provide a forward signal from the source to the local device; a return signal path electrically connecting the first diplexer and the second diplexer, and configured to provide a return signal from the local device to the source; a switching and termination unit positioned in the return signal path; and a signal processing unit positioned in the return signal path, and configured to: determine a power level of a signal in the return signal path at a first time and a second time, iteratively determine a dynamic noise threshold by selecting a minimum value of the power level at the first time and the second time, store the dynamic noise threshold for a predetermined time period starting after the second time, wherein the predetermined time period is longer than a time between the first time and the second time, determine whether the power level of the return signal path is greater than the dynamic noise threshold during the predetermined time period, actuate the switching and termination unit into a first state when the power level of the return signal is greater than the dynamic noise threshold, wherein the switching and termination unit allows communication in the return signal path when in the first state, and actuate the switching and termination unit into a second state when the power level of the return signal is less than the dynamic noise threshold, wherein the switching and termination unit blocks or attenuates communication in the return signal path when in the second state. 2. The system of claim 1 , wherein the first time and the second time are consecutive times at which the power level is determined. 3. The system of claim 1 , wherein the time between the first time and the second time is less than one second, and wherein the predetermined time period is greater than one hour. 4. The system of claim 3 , wherein the signal processing unit is configured to determine whether the power level exceeds the dynamic noise threshold multiple times during the predetermined time period. 5. The system of claim 1 , wherein the minimum value of the power level is used to predict a level of noise in the return signal. 6. The system of claim 1 , wherein the signal processing unit comprises a delay unit configured to provide a delay before actuating the switching and termination unit into the second state, and wherein the delay allows the return signal to complete transmission before communication in the return signal path is blocked or attenuated. 7. A noise mitigation device, comprising: a signal path configured to transmit a signal from a local device to a source; and a signal processing unit positioned in the signal path, and configured to: determine a power level of the signal path at a first time and a second time, determine a dynamic noise threshold based on the power level at the first time and the power level at the second time, store the dynamic noise threshold for a predetermined time period after the second time that is longer than a time between the first time and the second time, allow transmission of the signal from the local device to the source through the signal path when the power level exceeds the dynamic noise threshold during the predetermined time period, and block or attenuate transmission of at least a portion of the signal to the source through the signal path when the power level does not exceed the dynamic noise threshold during the predetermined time period. 8. The noise mitigation device of claim 7 , wherein the dynamic noise threshold is determined by selecting a minimum of the power level. 9. The noise mitigation device of claim 7 , wherein the first time and the second time are consecutive times at which the power level is determined. 10. The noise mitigation device of claim 7 , wherein the time between the first time and the second time is less than one second, and wherein the predetermined time period is greater than one second. 11. The noise mitigation device of claim 10 , wherein the signal processing unit is configured to determine whether the power level exceeds the dynamic noise threshold multiple times during the predetermined time period. 12. The noise mitigation device of claim 7 , further comprising: a second signal path configured to couple the local device to the source; a first diplexer comprising a high-pass port and a low-pass port; and a second diplexer comprising a high-pass port and a low-pass port, wherein: the signal path is coupled to the low-pass port of the first diplexer and the low-pass port of the second diplexer, and the second signal path is coupled to the high-pass port of the first diplexer and the high-pass port of the second diplexer. 13. The noise mitigation device of claim 12 , further comprising a switch and termination unit comprising: a first switch coupled to the low-pass port of the first diplexer; and a second switch coupled to the low-pass port of the second diplexer, wherein: the first switch and the second switch are configured to couple the first diplexer to the second diplexer via the signal path when the power level exceeds the dynamic noise threshold, and the first switch and the second switch are configured to couple to electrical ground when the power level does not exceed the dynamic noise threshold. 14. The noise mitigation device of claim 7 , wherein the signal processing unit further comprises: at least one memory configured to store a first sample of the power level at the first time and store a second sample of the power level at the second time, wherein the second time is delayed by an amount from the first time; and a differential circuit coupled to the at least one memory, and configured to: determine a smaller power level of the first sample and the second sample, and output the smaller power level as the dynamic noise threshold. 15. The noise mitigation device of claim 14 , wherein the signal processing unit further comprises: a first timing source coupled to the at least one memory, and configured to activate the at least one memory to store the first sample of the power level at the first time; and a second timing source coupled to the at least one memory, and configured to activate the at least one memory to store the second sample of the power level at the second time, wherein the second timing source comprises a monostable multi-vibrator configured to provide a delay from the first time. 16. The noise mitigation device of claim 14 , wherein the signal processing unit further comprises an integrator circuit coupled to the at least one memory, the integrator circuit being configured to determine the first sample of the power level and the second sample of the power level. 17. The noise mitigation device of claim 7 , further comprising a memory reset unit that is configured to reset the dynamic noise threshold after the predetermined time period.
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