Display panel and manufacturing method of the display panel, display device

Patent metadata

Field	Value
Publication number	US-10916738-B2
Application number	US-201816466499-A
Country	US
Kind code	B2
Filing date	Dec 3, 2018
Priority date	Apr 24, 2018
Publication date	Feb 9, 2021
Grant date	Feb 9, 2021

Abstract

The present disclosure provides a display panel, a manufacturing method of the display panel, and a display device. The manufacturing method includes: forming an auxiliary cathode layer; forming at least one tip structure on the auxiliary cathode layer; forming a main cathode layer, wherein the at least one tip structure is between the auxiliary cathode layer and the main cathode layer; and forming at least one connection between the main cathode layer and the auxiliary cathode layer by discharging at the at least one tip structure, wherein the at least one connection is electrically connected to the main cathode layer and the auxiliary cathode layer respectively.

First claim

What is claimed is:

1. A manufacturing method of a display panel, comprising:
forming an auxiliary cathode layer;
forming at least one tip structure on the auxiliary cathode layer;
forming a main cathode layer, wherein the at least one tip structure is between the auxiliary cathode layer and the main cathode layer; and
forming at least one connection between the main cathode layer and the auxiliary cathode layer by discharging at the at least one tip structure, wherein the at least one connection is electrically connected to the main cathode layer and the auxiliary cathode layer respectively, and the discharging at the at least one tip structure comprises:
applying a first voltage to the main cathode layer and applying a second voltage to the auxiliary cathode layer, a polarity of the first voltage being opposite to a polarity of the second voltage, or generating static electricity on the auxiliary cathode layer by using an electrostatic generation device, to discharge at the at least one tip structure.

2. The manufacturing method according to claim 1 , wherein
the step of forming the at least one tip structure comprises: etching a side of the auxiliary cathode layer such that the side of the auxiliary cathode layer is recessed to form the at least one tip structure.

3. The manufacturing method according to claim 1 , wherein
the auxiliary cathode layer is formed on a backplane glass before forming the main cathode layer; and
before forming the main cathode layer, the manufacturing method further comprises: forming an organic layer, a portion of the organic layer being located between the main cathode layer and the auxiliary cathode layer after the main cathode layer is formed;
wherein, the first voltage is a positive voltage, the second voltage is a negative voltage.

4. The manufacturing method according to claim 1 , wherein
at least one of the first voltage or the second voltage is a voltage whose magnitude varies with time.

5. The manufacturing method according to claim 1 , wherein the at least one tip structure comprises at least one bump.

6. The manufacturing method according to claim 5 , further comprising:
forming a driving transistor comprising a gate, a source, and a drain before forming the main cathode layer,
wherein the auxiliary cathode layer is formed in a process of forming at least one of the gate, the source, or the drain, and a material of the auxiliary cathode layer comprises at least one of materials of the gate, the source, or the drain;
wherein, the step of forming the at least one tip structure comprises: forming the at least one bump by etching the auxiliary cathode layer.

7. The manufacturing method according to claim 5 , further comprising:
forming an anode layer before forming the main cathode layer, the auxiliary cathode layer being formed in the process of forming the anode layer, and a material of the auxiliary cathode layer comprising a material of the anode layer;
wherein, the step of forming the at least one tip structure comprises: etching the auxiliary cathode layer with an adjustable etching rate to form the at least one bump.

8. The manufacturing method according to claim 5 , further comprising:
forming a pixel definition layer after forming the auxiliary cathode layer, a portion of which is formed on the auxiliary cathode layer;
wherein, the step of forming the at least one tip structure comprises: etching the portion of the pixel definition layer on the auxiliary cathode layer to form the at least one bump.

9. The manufacturing method according to claim 5 , wherein the step of forming the at least one tip structure comprises:
forming a photoresist on the auxiliary cathode layer; and
performing photolithography on the photoresist to form the at least one bump.

10. A display panel, comprising:
a main cathode layer;
an auxiliary cathode layer;
at least one tip structure on a surface of the auxiliary cathode layer close to the main cathode layer; and
at least one connection between the main cathode layer and the auxiliary cathode layer, electrically connected to the main cathode layer and the auxiliary cathode layer respectively, wherein the at least one connection covers the at least one tip structure;
wherein the at least one connection is formed by discharging at the at least one tip structure, and the discharging at the at least one tip structure comprises: applying a first voltage to the main cathode layer and applying a second voltage to the auxiliary cathode layer, a polarity of the first voltage being opposite to a polarity of the second voltage, or generating static electricity on the auxiliary cathode layer by using an electrostatic generation device, to discharge at the at least one tip structure.

11. The display panel according to claim 10 , wherein
the at least one tip structure comprises a corner of the auxiliary cathode layer.

12. The display panel according to claim 10 , wherein
a material of the at least one tip structure comprises a conductive material or an insulating material.

13. The display panel according to claim 10 , wherein
the display panel further comprises an anode layer and a driving transistor;
wherein, a material of the at least one tip structure comprises at least one of a material of the anode layer or a material of an electrode of the driving transistor.

14. The display panel according to claim 10 , wherein
the display panel further comprises a pixel definition layer, wherein a material of the at least one tip structure comprises a material of the pixel definition layer.

15. The display panel according to claim 10 , further comprising:
a main cathode pad electrode connected to the main cathode layer; and
an auxiliary cathode pad electrode connected to the auxiliary cathode layer.

16. The display panel according to claim 10 , wherein
the display panel further comprises: a backplane glass and a cover glass disposed opposite to the backplane glass, wherein the main cathode layer and the auxiliary cathode layer are between the backplane glass and the cover glass,
wherein the auxiliary cathode layer is between the main cathode layer and the backplane glass, or the auxiliary cathode layer is between the main cathode layer and the cover glass.

17. A display device, comprising: the display panel according to claim 10 .

18. The display panel according to claim 10 , wherein
the at least one tip structure comprises at least one bump.

19. The display panel according to claim 18 , wherein
the at least one connection is a part of the main cathode layer.

Assignees

• Hefei Xinsheng Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Sun Shi
• Xie Xuewu
• Liu Hao
• Zhang Ameng
• Ai Yu
• Liu Bowen
• Kong Yubao

Classifications

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K71/00

  Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

• H10K59/80522 Primary

  combined with auxiliary electrodes · CPC title

• H01L27/3276

  Electricity · mapped topic

• H01L51/5221

  Electricity · mapped topic