Display panel, and display device including the same

US10916588B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10916588-B2
Application numberUS-201916510686-A
CountryUS
Kind codeB2
Filing dateJul 12, 2019
Priority dateSep 12, 2018
Publication dateFeb 9, 2021
Grant dateFeb 9, 2021

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A display panel including a glass substrate having an opening area, and a display area at least partially surrounding the opening area; a thin film transistor on the display area including a semiconductor layer and a gate electrode; a display element electrically connected to the thin film transistor; a multi-layer including an insulating layer and a lower insulating layer. The insulating layer is between the glass substrate and the display element and the lower insulating layer is between the glass substrate and the insulating layer; and a thin-film encapsulation layer covering the display element including an inorganic encapsulation layer and an organic encapsulation layer. The multi-layer includes a first groove between the opening area and the display area. A first width of a portion of the first groove in the lower insulating layer is greater than a second width of a portion of the first groove in the insulating layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel comprising: a glass substrate comprising an opening area, and a display area at least partially surrounding the opening area; a thin film transistor on the display area and comprising a semiconductor layer and a gate electrode; a display element electrically connected to the thin film transistor; a multi-layer comprising at least one insulating layer and a lower insulating layer, wherein the at least one insulating layer is between the glass substrate and the display element and the lower insulating layer is between the glass substrate and the at least one insulating layer; and a thin-film encapsulation layer covering the display element and comprising at least one inorganic encapsulation layer and at least one organic encapsulation layer, wherein the multi-layer comprises a first groove located between the opening area and the display area, and wherein a first width of a portion of the first groove in the lower insulating layer is greater than a second width of a portion of the first groove in the at least one insulating layer. 2. The display panel of claim 1 , wherein a bottom surface of the first groove is on a virtual surface between an upper surface of the lower insulating layer and an upper surface of the glass substrate or on a same virtual surface as the upper surface of the glass substrate. 3. The display panel of claim 1 , wherein the at least one insulating layer comprises a first hole corresponding to the first groove, and the lower insulating layer comprises a second hole or a recess corresponding to the first groove. 4. The display panel of claim 3 , wherein a lateral surface of the at least one insulating layer facing a center of the first groove is closer to the center of the first groove than a lateral surface of the lower insulating layer facing the center of the first groove. 5. The display panel of claim 1 , wherein the lower insulating layer is in direct contact with an upper surface of the glass substrate. 6. The display panel of claim 1 , wherein the at least one inorganic encapsulation layer covers an inner surface of the first groove. 7. The display panel of claim 1 , wherein a portion of the at least one inorganic encapsulation layer is in direct contact with a portion of the glass substrate within the first groove. 8. The display panel of claim 1 , wherein the glass substrate comprises a first opening corresponding to the opening area. 9. The display panel of claim 8 , wherein an end of the glass substrate that defines the first opening is closer to a center of the opening area than an end of the lower insulating layer facing the opening area. 10. The display panel of claim 1 , wherein the multi-layer further comprises a second groove between the first groove and the opening area. 11. The display panel of claim 10 , wherein an end of the at least one organic encapsulation layer is between the first groove and the second groove. 12. The display panel of claim 10 , further comprising a partition wall on the multi-layer and located between the first groove and the second groove. 13. The display panel of claim 1 , wherein the lower insulating layer comprises an organic insulating layer and the at least one insulating layer comprises an inorganic insulating layer. 14. The display panel of claim 1 , wherein the lower insulating layer comprises at least one of silicon nitride and silicon oxycarbide, and the at least one insulating layer comprises an inorganic insulating layer that comprises a different material from the lower insulating layer. 15. A display device comprising: a substrate comprising an opening; a thin film transistor on a display area of the substrate, the display area at least partially surrounding the opening, and comprising a semiconductor layer and a gate electrode; a display element electrically connected to the thin film transistor; a multi-layer comprising a lower insulating layer and at least one insulating layer, wherein the lower insulating layer is located on the substrate and the at least one insulating layer is located on the lower insulating layer and comprises a different material from the lower insulating layer; and an encapsulation layer configured to cover the display element, wherein the multi-layer comprises a first groove that is concave in a depth direction of the multi-layer, and a width of a portion of the first groove in the lower insulating layer is greater than a width of a portion of the first groove in the at least one insulating layer. 16. The display device of claim 15 , wherein the substrate comprises a glass material, a polymer material, or a metal material. 17. The display device of claim 15 , wherein a bottom surface of the first groove is on a virtual surface between an upper surface of the lower insulating layer and an upper surface of the substrate or on a same virtual surface as the upper surface of the substrate. 18. The display device of claim 15 , wherein the at least one insulating layer comprises a first hole corresponding to the first groove, and the lower insulating layer comprises a second hole or a recess corresponding to the first groove. 19. The display device of claim 15 , wherein the at least one insulating layer comprises an inorganic insulating layer. 20. The display device of claim 19 , wherein the lower insulating layer comprises an organic insulating layer or comprises an inorganic insulating layer that is different from the at least one insulating layer. 21. The display device of claim 15 , wherein a lateral surface of the at least one insulating layer directed toward a center of the first groove protrudes farther than a lateral surface of the lower insulating layer directed toward the center of the first groove. 22. The display device of claim 15 , wherein an end of the substrate directed toward the opening protrudes toward the opening farther than an end of the lower insulating layer directed toward the opening. 23. The display device of claim 15 , wherein the multi-layer further comprises a second groove between the first groove and the opening. 24. The display device of claim 23 , wherein the encapsulation layer comprises at least one inorganic encapsulation layer and at least one organic encapsulation layer, and the at least one inorganic encapsulation layer covers an inner surface of each of the first groove and the second groove. 25. The display device of claim 24 , wherein a portion of the at least one organic encapsulation layer at least partially fills the first groove. 26. The display device of claim 25 , further comprising a partition wall on the multi-layer and located between the first groove and the second groove. 27. The display device of claim 24 , wherein the at least one inorganic encapsulation layer is in direct contact with an upper surface of the substrate within the first groove or the second groove. 28. The display device of claim 15 , wherein the at least one insulating layer comprises a first insulating layer and a second insulating layer on the first insulating layer, the first and second insulating layers comprising different materials; and the first insulating layer and the second insulating layer comprise holes corresponding to the first groove, respectively, and a width of the hole of the second insulating layer is less than a width of the hole of the first insulating layer.

Assignees

Inventors

Classifications

  • H10K59/124Primary

    Insulating layers formed between TFT elements and OLED elements · CPC title

  • Flexible substrates · CPC title

  • Cathodes · CPC title

  • Interconnections, e.g. wiring lines or terminals · CPC title

  • multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10916588B2 cover?
A display panel including a glass substrate having an opening area, and a display area at least partially surrounding the opening area; a thin film transistor on the display area including a semiconductor layer and a gate electrode; a display element electrically connected to the thin film transistor; a multi-layer including an insulating layer and a lower insulating layer. The insulating layer…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/124. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 09 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).