Electronic device and power transmission circuit of same

Patent metadata

Field	Value
Publication number	US-10915125-B2
Application number	US-201916534979-A
Country	US
Kind code	B2
Filing date	Aug 7, 2019
Priority date	Oct 1, 2018
Publication date	Feb 9, 2021
Grant date	Feb 9, 2021

Abstract

A power transmission circuit includes a first transmission transistor, a second transmission transistor, and a first control circuit. A first terminal of the first transmission transistor is used as a power input terminal of the power transmission circuit. A second terminal of the first transmission transistor is coupled to a first node. A control terminal of the first transmission transistor is coupled to a control node. A first terminal of the second transmission transistor is used as a power output terminal of the power transmission circuit. A second terminal of the second transmission transistor is coupled to the first node. When a voltage of the power output terminal is greater than or equal to a voltage of the power input terminal, the first control circuit outputs a first voltage to the control node, to turn off the first transmission transistor and the second transmission transistor.

First claim

What is claimed is:

1. A power transmission circuit, comprising:
a first transmission transistor, a first terminal of the first transmission transistor being used as a power input terminal of the power transmission circuit, a second terminal of the first transmission transistor being coupled to a first node, and a control terminal of the first transmission transistor being coupled to a control node;
a second transmission transistor, a first terminal of the second transmission transistor being used as a power output terminal of the power transmission circuit, a second terminal of the second transmission transistor being coupled to the first node, and a control terminal of the second transmission transistor being coupled to the control node; and
a first control circuit, coupled to the power input terminal, the power output terminal, and the control node, wherein when a voltage of the power output terminal is greater than or equal to a voltage of the power input terminal, the first control circuit outputs a first voltage to the control node, to turn off the first transmission transistor and the second transmission transistor, wherein the first control circuit comprises:
a first input transistor, a first terminal of the first input transistor being coupled to the power input terminal, and a second terminal of the first input transistor being coupled to a control terminal of the first input transistor;
a voltage divider circuit, coupled between the second terminal of the first input transistor and a ground voltage terminal, and used to divide a voltage of the second terminal of the first input transistor to generate a third voltage;
a second input transistor, a first terminal of the second input transistor being coupled to the power output terminal, a second terminal of the second input transistor being coupled to the control node, and a control terminal of the second input transistor being coupled to the voltage divider circuit to receive the third voltage; and
a capacitor, coupled between the second terminal of the second input transistor and the ground voltage terminal.

2. The power transmission circuit according to claim 1 , wherein when the voltage of the power output terminal is less than the voltage of the power input terminal, the first control circuit outputs a second voltage to the control node, to turn on the first transmission transistor and the second transmission transistor.

3. The power transmission circuit according to claim 1 , further comprising:
a second control circuit, coupled to the first node and the control node, and receiving a disable signal, wherein the second control circuit turns off the first transmission transistor and the second transmission transistor in response to the disable signal.

4. The power transmission circuit according to claim 3 , wherein the second control circuit comprises:
a first control transistor, a first terminal of the first control transistor being coupled to a ground voltage terminal, and a control terminal of the first control transistor receiving the disable signal;
a first capacitor, coupled between the control terminal of the first control transistor and the ground voltage terminal;
a second capacitor, a first terminal of the second capacitor being coupled to a second terminal of the first control transistor; and
a second control transistor, a first terminal of the second control transistor being coupled to the control node, a second terminal of the second control transistor being coupled to the first node, and a control terminal of the second control transistor being coupled to a second terminal of the second capacitor.

5. An electronic device, comprising:
a device body, coupled to a power bus; and
at least one power transmission circuit, a power input terminal of each of the at least one power transmission circuit being used to receive one of at least one input power, and the power output terminal of each of the at least one power transmission circuit being coupled to the power bus to power the device body,
wherein each of the at least one power transmission circuit comprises:
a first transmission transistor, a first terminal of the first transmission transistor being used as the power input terminal of the power transmission circuit, a second terminal of the first transmission transistor being coupled to a first node, and a control terminal of the first transmission transistor being coupled to a control node;
a second transmission transistor, a first terminal of the second transmission transistor being used as the power output terminal of the power transmission circuit, a second terminal of the second transmission transistor being coupled to the first node, and a control terminal of the second transmission transistor being coupled to the control node; and
a first control circuit, coupled to the power input terminal, the power output terminal, and the control node, wherein when a voltage of the power output terminal is greater than or equal to a voltage of the power input terminal, the first control circuit outputs a first voltage to the control node, to turn off the first transmission transistor and the second transmission transistor, wherein the first control circuit comprises:
a first input transistor, a first terminal of the first input transistor being coupled to the power input terminal, and a second terminal of the first input transistor being coupled to a control terminal of the first input transistor;
a voltage divider circuit, coupled between the second terminal of the first input transistor and a ground voltage terminal, and used to divide a voltage of the second terminal of the first input transistor to generate a third voltage;
a second input transistor, a first terminal of the second input transistor being coupled to the power output terminal, a second terminal of the second input transistor being coupled to the control node, and a control terminal of the second input transistor being coupled to the voltage divider circuit to receive the third voltage; and
a capacitor, coupled between the second terminal of the second input transistor and the ground voltage terminal.

6. The electronic device according to claim 5 , wherein when the voltage of the power output terminal is less than the voltage of the power input terminal, the first control circuit outputs a second voltage to the control node, to turn on the first transmission transistor and the second transmission transistor.

7. The electronic device according to claim 5 , wherein each of the at least one power transmission circuit further comprises:
a second control circuit, coupled to the first node and the control node, and receiving a disable signal, wherein the second control circuit turns off the first transmission transistor and the second transmission transistor in response to the disable signal.

8. The electronic device according to claim 7 , wherein the second control circuit comprises:
a first control transistor, a first terminal of the first control transistor being coupled to a ground voltage terminal, and a control terminal of the first control transistor receiving the disable signal;
a first capacitor, coupled between the control terminal of the first control transistor and the ground voltage terminal;
a second capacitor, a first terminal of the second capacitor being coupled to a second terminal of the first control transistor; and
a second control transistor, a first terminal of the second control transistor being coupled to the control node, a second terminal of the second control transistor being coupled to the first node, and a control terminal of the second control transistor being coupled to a second terminal of the second capacitor.

9. The electronic device according to cla

Assignees

• Pegatron Corp

Inventors

• Lin Feng-Yu
• Sung Hsiao-Wei

Classifications

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title

• H02M1/0048

  Circuits or arrangements for reducing losses (using snubbers H02M1/34) · CPC title

• H02M3/156 Primary

  with automatic control of output voltage or current, e.g. switching regulators · CPC title

• H03K17/005

  with several inputs only · CPC title

• H03K2217/0063

  High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load · CPC title