Method for manufacturing pattern for electronic devices, and fiber-type electronic device comprising the pattern for electronic devices

Patent metadata

Field	Value
Publication number	US-10915024-B2
Application number	US-201816032585-A
Country	US
Kind code	B2
Filing date	Jul 11, 2018
Priority date	Jul 18, 2017
Publication date	Feb 9, 2021
Grant date	Feb 9, 2021

Abstract

A fiber-type electronic device comprising a pattern for electronic devices stacked on a fiber filament substrate is provided. It is possible to manufacture an electronic device directly on a fiber filament substrate by applying the pattern for electronic devices. Thus, it can be widely used for wearable devices and the like. The pattern for electronic devices is manufactured by a method for forming a pattern for electronic devices comprising an exposure process using a maskless exposure apparatus. Thus, it is possible to manufacture a pattern for electronic devices on a fiber filament substrate through a continuous process and thus to increase the process efficiency.

First claim

What is claimed is:

1. A method for forming a pattern for electronic devices on a fiber filament substrate, the method comprising:
adjusting a surface roughness of a fiber filament substrate;
forming a photoresist film on the fiber filament substrate;
performing an exposure process, a photocuring process, and a development process on the photoresist film to form a photoresist pattern;
performing a deposition process on a top surface of the photoresist pattern and a top surface of the fiber filament substrate on which the photoresist pattern is not formed to form a patterning layer for electronic devices; and
removing the photoresist pattern and the patterning layer for electronic devices formed on the photoresist pattern from the fiber filament substrate to form a pattern for electronic devices,
wherein the exposure process is performed using a maskless exposure apparatus.

2. The method according to claim 1 ,
wherein the fiber filament substrate has a root mean square roughness of less than 50 nm.

3. The method according to claim 1 ,
wherein the fiber filament substrate has an aspect ratio of 100 or more.

4. The method according to claim 1 ,
wherein the maskless exposure apparatus comprises a maskless exposure unit for directly exposing the photoresist film using exposure data generated based on design data for the fiber filament substrate, and
wherein the design data comprises pattern information for electronic devices predetermined for at least one conductive pattern to be formed on the fiber filament substrate and predetermined pad layout information of an electronic component to be mounted or formed on the pattern for electronic devices.

5. The method according to claim 4 ,
wherein the maskless exposure unit comprises a scaling correction value generating unit for measuring an elongation and contraction of the fiber filament substrate after photocuring and development relative to the fiber filament substrate before exposure and for generating a scaling correction value to correct a position and shape of the exposure data based on the measured elongation and contraction.

6. The method according to claim 1 ,
wherein the pattern for electronic devices comprises a pattern array for electronic devices comprising a plurality of patterns for electronic devices, and wherein the patterns for electronic devices of the pattern array have different areas from one another.

7. The method according to claim 6 ,
wherein the pattern array for electronic devices is divided into a first region and a second region, and
wherein the patterns for electronic devices in the first region have a smaller area than the patterns for electronic devices in the second region.

8. The method according to claim 1 ,
wherein the pattern for electronic devices comprises a pattern array for electronic devices comprising a plurality of patterns for electronic devices, and wherein the patterns for electronic devices of the pattern array are arranged such that the patterns have different shapes from one another.

9. The method according to claim 1 ,
wherein the pattern for electronic devices is formed to a thickness of 1 nm to 1 μm.

10. The method according to claim 1 ,
wherein the exposure process is performed at a temperature of −20° C. to 100° C. and a pressure of 1×10 −8 torr to 1,500 torr.

11. The method according to claim 1 ,
wherein the fiber filament substrate comprises at least one selected from the group consisting of a transparent glass fiber, an opaque glass fiber, a metal fiber, a transparent insulating polymeric fiber, a transparent conductive polymeric fiber, an opaque conductive polymeric fiber, an inorganic semiconductor fiber, an organic semiconductor fiber, and an oxide semiconductor fiber.

12. The method according to claim 1 ,
wherein the fiber filament substrate has a cylindrical, trigonal prism, square pillar, or polyprism shape.

13. The method according to claim 1 ,
wherein the pattern for electronic devices is at least one selected from the group consisting of a source electrode, a drain electrode, an insulating layer, and wiring of an electronic device.

14. The method according to claim 1 ,
wherein the pattern for electronic devices is formed by a continuous manufacturing process.

15. A method for manufacturing fiber-type electronic devices comprising performing the method for forming a pattern for electronic devices on a fiber filament substrate according to claim 1 .

16. A method for forming a pattern for electronic devices on a fiber filament substrate, the method comprising:
forming a patterning layer for electronic devices on a fiber filament substrate;
forming a photoresist film on the patterning layer for electronic devices;
performing an exposure process, a photocuring process, and a development process on the photoresist film to form a photoresist pattern;
performing an etching process on the patterning layer for electronic devices using the photoresist pattern as a mask pattern to form a pattern for electronic devices; and
removing the photoresist pattern,
wherein the exposure process is performed using a maskless exposure apparatus.

Assignees

• Korea Inst Sci & Tech

Inventors

• HWANG Sunbin
• Lee Dong Su
• Jeon Dae-Young
• Bae Sukang
• Lee Seoung-Ki
• Lee Sang Hyun
• Kim Tae-Wook

Classifications

• H10P76/202

  for lift-off processes · CPC title

• H10D30/6758

  characterised by the insulating substrates · CPC title

• H10D30/031

  of thin-film transistors [TFT] · CPC title

• H10D84/83

  of only insulated-gate FETs [IGFET] · CPC title

• H10D89/10 Primary

  Integrated device layouts · CPC title