PWM capacitor control

Patent metadata

Field	Value
Publication number	US-10913368-B2
Application number	US-201816038569-A
Country	US
Kind code	B2
Filing date	Jul 18, 2018
Priority date	Feb 8, 2016
Publication date	Feb 9, 2021
Grant date	Feb 9, 2021

Abstract

Methods, systems, and devices for controlling a variable capacitor. One aspect features a variable capacitance device that includes a capacitor, a first transistor, a second transistor, and control circuitry. The control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations including detecting a zero-crossing of an input current at a first time. Switching off the first transistor. Estimating a first delay period for switching the first transistor on when a voltage across the capacitor is zero. Switching on the first transistor after the first delay period from the first time. Detecting a zero-crossing of the input current at a second time. Switching off the second transistor. Estimating a second delay period for switching the second transistor on when a voltage across the capacitor is zero. Switching on the second transistor after the second delay period from the second time.

First claim

What is claimed is:

1. A variable capacitance device comprising:
a capacitor;
a first transistor comprising a first-transistor first terminal, a first-transistor second terminal, and a first-transistor gate terminal, the first-transistor first terminal electrically connected to a first terminal of the capacitor;
a second transistor comprising a second-transistor first terminal, a second-transistor second terminal, and a second-transistor a gate terminal, the second-transistor first terminal electrically connected to a second terminal of the capacitor, and the second-transistor second terminal electrically connected to the first-transistor second terminal; and
control circuitry coupled to the first-transistor gate terminal and the second-transistor gate terminal, wherein the control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations comprising:
generating an alternating ramp signal having peaks and troughs that are timed to correspond with zero-crossings of an input current, and
switching off the first transistor in response to the ramp signal crossing a first reference value; and
switching on the first transistor following a fixed time delay after the ramp signal crosses the first reference value following a peak or trough in the ramp signal.

2. The device of claim 1 , wherein the first and second transistors are selected from the group consisting of: silicon MOSFET transistors, silicon carbide MOSFET transistors, or gallium nitride MOSFET transistors.

3. The device of claim 1 , wherein the capacitor is electrically connected to an impedance matching system.

4. The device of claim 1 , wherein operations comprise:
switching off the second transistor following a second fixed time delay after the ramp signal crosses a second reference value; and
switching on the second transistor in response to the ramp signal crossing the second reference value following a second peak or trough in the ramp signal.

5. A variable capacitance device comprising:
a capacitor;
a first transistor comprising a first-transistor first terminal, a first-transistor second terminal, and a first-transistor gate terminal, the first-transistor first terminal electrically connected to a first terminal of the capacitor;
a second transistor comprising a second-transistor first terminal, a second-transistor second terminal, and a second-transistor a gate terminal, the second-transistor first terminal electrically connected to a second terminal of the capacitor, and the second-transistor second terminal electrically connected to the first-transistor second terminal; and
control circuitry coupled to the first-transistor gate terminal and the second-transistor gate terminal, wherein the control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations comprising:
generating an alternating ramp signal having peaks and troughs that are timed to correspond with zero-crossings of an input current,
switching off the first transistor in response to the ramp signal crossing a first reference value when the ramp signal has a first slope;
switching on the first transistor in response to the ramp signal crossing the first reference value when the ramp signal has a second slope;
switching off the second transistor in response to the ramp signal crossing a second reference value when the ramp signal has the second slope; and
switching on the second transistor in response to the ramp signal crossing the second reference value when the ramp signal has the first slope.

6. The device of claim 5 , wherein the effective capacitance of the capacitor is controlled by the first and second reference values.

7. The device of claim 5 , wherein the second reference value has a value that is the negative of the first reference value.

8. The device of claim 5 , wherein the operations comprise switching on the first transistor after the ramp signal crosses the first reference value and in response to a zero-voltage condition across the capacitor.

9. The device of claim 5 , wherein the first and second transistors are selected from the group consisting of: silicon MOSFET transistors, silicon carbide MOSFET transistors, or gallium nitride MOSFET transistors.

10. The device of claim 5 , wherein the capacitor is electrically connected to an impedance matching system.

11. A high-power wireless energy transfer system comprising:
a variable capacitance device comprising:
a capacitor;
a first transistor comprising a first-transistor first terminal, a first-transistor second terminal, and a first-transistor gate terminal, the first-transistor first terminal electrically connected to a first terminal of the capacitor;
a second transistor comprising a second-transistor first terminal, a second-transistor second terminal, and a second-transistor a gate terminal, the second-transistor first terminal electrically connected to a second terminal of the capacitor, and the second-transistor second terminal electrically connected to the first-transistor second terminal; and
control circuitry coupled to the first-transistor gate terminal and the second-transistor gate terminal, wherein the control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations comprising:
generating an alternating ramp signal having peaks and troughs that are timed to correspond with zero-crossings of an input current, and
switching off the first transistor in response to the ramp signal crossing a first reference value; and
switching on the first transistor following a fixed time delay after the ramp signal crosses the first reference value following a peak or trough in the ramp signal; and

an inductive coil electrically coupled to the variable capacitance.

12. The system of claim 11 , wherein operations comprise:
switching off the second transistor following a second fixed time delay after the ramp signal crosses a second reference value; and
switching on the second transistor in response to the ramp signal crossing the second reference value following a second peak or trough in the ramp signal.

13. The system of claim 11 , wherein the first and second transistors are selected from the group consisting of: silicon MOSFET transistors, silicon carbide MOSFET transistors, or gallium nitride MOSFET transistors.

14. The system of claim 11 , wherein the capacitor is electrically connected to an impedance matching system.

15. A high-power wireless energy transfer system comprising:
a variable capacitance device comprising:
a capacitor;
a first transistor comprising a first-transistor first terminal, a first-transistor second terminal, and a first-transistor gate terminal, the first-transistor first terminal electrically connected to a first terminal of the capacitor;
a second transistor comprising a second-transistor first terminal, a second-transistor second terminal, and a second-transistor a gate terminal, the second-transistor first terminal electrically connected to a second terminal of the capacitor, and the second-transistor second terminal electrically connected to the first-transistor second terminal; and
control circuitry coupled to the first-transistor gate terminal and the second-transistor gate terminal, wherein the control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations comprising:
generating an alternating ramp signal having peaks and troughs that are timed to correspond with zero-crossings of an input current,
switching off the first transistor in response to the ramp signal crossing a f

Assignees

• Witricity Corp

Inventors

• Kurs Andre B
• Danilovic Milisav

Classifications

• H02M1/38

  Means for preventing simultaneous conduction of switches · CPC title

• H02M1/088

  for the simultaneous control of series or parallel connected semiconductor devices · CPC title

• H02M1/083

  for the ignition at the zero crossing of the voltage or the current · CPC title

• H02J50/12 Primary

  of the resonant type · CPC title

• H02J7/02

  for charging batteries from AC mains by converters · CPC title