Patch panel for QSFP+ cable

Patent metadata

Field	Value
Publication number	US-10911297-B2
Application number	US-201816108978-A
Country	US
Kind code	B2
Filing date	Aug 22, 2018
Priority date	Mar 9, 2015
Publication date	Feb 2, 2021
Grant date	Feb 2, 2021

Abstract

Provided is a QSFP+ patch panel, comprising: a circuit board; a plurality of pairs of QSFP+ sockets connected to one another via conductive traces of the circuit board; and one or more microcontrollers coupled to at least two of the conductive traces of each pair of QSFP+ sockets. The one or more microcontrollers comprise memory storing instructions that when executed cause the one or more microcontrollers to perform operations comprising: obtaining configuration settings for the QSFP+ sockets; and configuring connections of the QSFP+ sockets based on the configuration settings.

First claim

What is claimed is:

1. An apparatus, comprising:
a pair of sockets configured to receive respective transceivers coupled to respective QSFP+ cables;
a plurality of communication links communicatively coupling the pair of sockets;
a microcontroller coupled to at least one of the communication links and comprising a memory storing instructions that when executed cause the microcontroller to perform operations comprising:
detecting a coupling of a first transceiver to a first one of the sockets;
obtaining one or more configuration settings for the first one of the sockets; and
configuring the first one of the sockets based on the configuration settings; and
controlling the first one of the sockets based on the configuration settings to transfer data between the first transceiver and a second transceiver coupled to a second one of the sockets, wherein controlling the first one of the sockets based on the configuration settings comprises:
controlling the first one of the sockets at a first time to cause the first transceiver to transmit data to the second transceiver; and
controlling the first one of the sockets at a second time to cause the first transceiver to receive data from the second transceiver.

2. The apparatus of claim 1 , wherein configuring the first one of the sockets based on the configuration settings comprises:
accessing, responsive to at least one of the configuration settings, a register of the first transceiver coupled to the first one of the sockets via the at least one communication link.

3. The apparatus of claim 2 , further comprising:
controlling the first one of the sockets based on the configuration settings and a value of the register.

4. The apparatus of claim 2 , further comprising:
controlling the first one of the sockets based on a value written to the register, the value specified by the configuration settings.

5. The apparatus of claim 2 , further comprising:
controlling the first one of the sockets based on a value read from the register.

6. The apparatus of claim 1 , further comprising:
obtaining second configuration settings for the second one of the sockets; and
configuring the second one of the sockets based on the second configuration settings.

7. The apparatus of claim 6 , further comprising:
controlling the second one of the sockets based on the second configurations settings to transfer data between the first transceiver and the second transceiver coupled to the second one of the sockets.

8. The apparatus of claim 1 , wherein the microcontroller is coupled to at least two of the communication links, and wherein the instructions cause the microcontroller to perform operations comprising:
transmitting data for configuring or controlling the first one of the sockets over a first one of the two communication links; and
generating a clock on a second one of the two communication links for transmitting the data for configuring or controlling the first one of the sockets.

9. The apparatus of claim 1 , wherein configuring the first one of the sockets comprises configuring the first transceiver coupled to the first one of the sockets in response to detecting the coupling of the first transceiver to the first one of the sockets.

10. An apparatus, comprising:
a pair of sockets configured to receive respective transceivers coupled to respective QSFP+ cables;
a plurality of communication links communicatively coupling the pair of sockets;
a microcontroller coupled to at least one of the communication links and comprising a memory storing instructions that when executed cause the microcontroller to perform operations comprising:
detecting a coupling of a first transceiver to a first one of the sockets;
obtaining one or more configuration settings for a second one of the sockets; and
configuring the second one of the sockets based on the configuration settings; and
controlling the second one of the sockets based on the configurations settings to transfer data between the first transceiver and a second transceiver coupled to the second one of the sockets, wherein controlling the second one of the sockets based on the configuration settings comprises:

controlling the second one of the sockets at a first time to cause the second transceiver to transmit data to the first transceiver; and
controlling the second one of the sockets at a second time to cause the second transceiver to receive data from the first transceiver.

11. The apparatus of claim 10 , wherein configuring the second one of the sockets based on the configuration settings comprises:
accessing, responsive to at least one of the configuration settings, a register of the second transceiver coupled to the second one of the sockets via the at least one communication link.

12. The apparatus of claim 11 , further comprising:
controlling the second one of the sockets based on the configuration settings and a value of the register.

13. The apparatus of claim 11 , further comprising:
controlling the second one of the sockets based on a value written to the register, the value specified by the configuration settings.

14. The apparatus of claim 11 , further comprising:
controlling the second one of the sockets based on a value read from the register.

15. The apparatus of claim 10 , further comprising:
obtaining second configuration settings for the first one of the sockets; and
configuring the first one of the sockets based on the second configuration settings.

16. The apparatus of claim 15 , further comprising:
controlling the first one of the sockets based on the second configurations settings to transfer data between the first transceiver and the second transceiver coupled to the second one of the sockets.

17. The apparatus of claim 10 , wherein the microcontroller is coupled to at least two of the communication links, the instructions causing the microcontroller to perform operations comprising:
transmitting data for configuring or controlling the second one of the sockets over a first one of the two communication links; and
generating a clock on a second one of the two communication links for transmitting the data for configuring or controlling the second one of the sockets.

18. The apparatus of claim 17 , wherein configuring the second one of the sockets comprises configuring the second transceiver coupled to the second one of the sockets in response to detecting the coupling of the first transceiver to the first one of the sockets.

19. An apparatus, comprising:
a pair of sockets configured to receive respective transceivers coupled to respective QSFP+ cables;
a plurality of communication links communicatively coupling the pair of sockets;
a microcontroller coupled to at least one of the communication links and comprising a memory storing instructions that when executed cause the microcontroller to perform operations comprising:
detecting a coupling of a first transceiver to a first one of the sockets;
obtaining one or more configuration settings for the first one of the sockets; and
configuring the first one of the sockets based on the configuration settings; and
controlling the first one of the sockets based on the configuration settings to transfer data between the first transceiver and a second transceiver coupled to a second one of the sockets, wherein the microcontroller is coupled to at least two of the communication links, and wherein the instructions cause the microcontroller to perform operations comprising:
transmitting data for configuring or controlling the first one of the s

Assignees

• Vapor Io Inc

Inventors

• Crawford Colton Malone
• White Steven

Classifications

• H05K7/20736

  within cabinets for removing heat from server blades · CPC title

• H05K7/1497 Primary

  Rooms for data centers; Shipping containers therefor · CPC title

• H05K7/1492

  having electrical distribution arrangements, e.g. power supply or data communications · CPC title

• H04L41/0803 Primary

  Configuration setting · CPC title

• G06F1/305

  in the event of power-supply fluctuations · CPC title