Apparatus, method and system to support codes with variable codeword lengths and information lengths

US10911071B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10911071-B2
Application numberUS-201616074521-A
CountryUS
Kind codeB2
Filing dateJun 13, 2016
Priority dateApr 8, 2016
Publication dateFeb 2, 2021
Grant dateFeb 2, 2021

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The present disclosure includes systems and methods for supporting polar codewords with variable polar codeword lengths. Variable codeword length codewords are communicated using an n-bit encoder/n-bit decoder having n inputs and n corresponding outputs. Each input and each corresponding output is associated with a bit index. A set of bit indices to be shortened are selected. The encoder encodes n input bits to obtain n output bits. Each output bit that is associated with a bit index from the set of bit indices to be shortened is ignored. A codeword is generated from all of the remaining output bits.

First claim

Opening claim text (preview).

The invention claimed is: 1. An apparatus of a device for wireless communication in an evolved universal terrestrial radio access network (E-UTRAN), the apparatus comprising: an n-bit encoder having n inputs and n corresponding outputs, wherein each input and each corresponding output is associated with a bit index; and one or more processors to: select a set of bit indices to be shortened; encode, via the n-bit encoder, n input bits to obtain n output bits; ignore output bits that are associated with a bit index from the set of bit indices to be shortened; generate a codeword from the remaining output bits; and cause transmission of the codeword from the device over a cellular air interface to another device in the E-UTRAN. 2. The apparatus of claim 1 , wherein the one or more processors to select a set of bit indices to be shortened are further to: identify one or more bit indices with associated outputs that are only a function of the corresponding inputs, wherein the set of bit indices to be shortened are selected from the identified one or more bit indices. 3. The apparatus of claim 1 , wherein the one or more processors are further to: obtain control information; and determine a desired codeword length and a desired code rate based on the obtained control information. 4. The apparatus of claim 3 , wherein the one or more processors to select a set of bit indices to be shortened are further to: determine a number of bit indices to select based on a difference between the desired codeword length and the n output bits of the n-bit encoder, wherein a number of bit indices in the set of bit indices to be shortened equals the determined number of bit indices. 5. The apparatus of claim 3 , wherein the one or more processors are further to: determine an error probability for each of the n inputs; identify the set of bit indices to be shortened as shortened indices; identify a second subset of the bit indices as data indices based at least in part on the determined desired code rate and the determined error probability for each of the n inputs; and identify any remaining bit indices as frozen indices. 6. The apparatus of claim 5 , wherein the one or more processors are further to: set the inputs for the shortened indices and the frozen indices to be predetermined values; and set the inputs for the data indices using obtained data, wherein the set input values are encoded to obtain the n output bits. 7. The apparatus of claim 1 , wherein the one or more processors to select a set of bit indices to be shortened are further to: select the set of bit indices to be shortened based on at least one rule. 8. The apparatus of claim 7 , wherein the at least one rule comprises a first rule where the one or more processors are to: select a number of last bit indices. 9. The apparatus of claim 7 , wherein the at least one rule comprises a second rule where the one or more processors are to: determine a Hamming weight for each of the bit indices; and select a number of bit indices based on the determined Hamming weight, wherein the bit indices with a largest Hamming weight are selected. 10. The apparatus of claim 1 , further comprising: transmission circuitry coupled to the one or more processors, the transmission circuitry to transmit the codeword from the device to said another device in the E-UTRAN over the cellular air interface. 11. An apparatus of a device for wireless communication in an evolved universal terrestrial radio access network (E-UTRAN), the apparatus comprising: an n-bit decoder having n inputs and n corresponding outputs, wherein each input and each corresponding output is associated with a bit index; and one or more processors to: select a set of bit indices to be shortened; initialize, with a predetermined value, input bits of the n-bit decoder that are associated with the selected set of bit indices; initialize remaining input bits of the n-bit decoder with a likelihood ratio for each of the remaining input bits, wherein the remaining input bits correspond to bits of a codeword received by the device over a cellular air interface from another device in the E-UTRAN; and decode, via the n-bit decoder, n input bits of the codeword to obtain n output bits. 12. The apparatus of claim 11 , wherein the one or more processors to select a set of bit indices to be shortened are further to: identify one or more of bit indices with associated outputs that are only a function of the corresponding input bits, wherein the set of bit indices to be shortened are selected from the identified one or more bit indices. 13. The apparatus of claim 11 , wherein the one or more processors are further to: obtain control information; and determine a codeword length and a code rate based on the obtained control information. 14. The apparatus of claim 13 , wherein the one or more processors to select a set of bit indices to be shortened are further to: determine a number of bit indices to select based on a difference between the determined codeword length and the n inputs of the n-bit decoder, wherein a number of bit indices in the set of bit indices to be shortened equals the determined number of bit indices. 15. The apparatus of claim 13 , wherein the one or more processors are further to: identify the set of bit indices to be shortened as shortened indices; identify a second subset of the bit indices as data indices based at least in part on the determined code rate and a determined error probability for each input bit of an encoder; and identify any remaining bit indices as frozen indices. 16. The apparatus of claim 15 , wherein the one or more processors are further to: discard each output bit that is associated with an identified shortened index; discard each output bit that is associated with an identified frozen index; and obtain transmitted data from each output bit that is associated with an identified data index. 17. The apparatus of claim 11 , further comprising: reception circuitry coupled to the one or more processors, the reception circuitry to receive the codeword over the cellular air interface at the device from said another device in the E-UTRAN. 18. A method for wireless communication, comprising: selecting a set of bit indices of an n-bit decoder to be shortened, the n-bit decoder having n inputs and n corresponding outputs, wherein each input and each corresponding output is associated with a bit index; initializing, with a predetermined value, input bits of the n-bit decoder that are associated with the selected set of bit indices; initializing remaining input bits of the n-bit decoder with a likelihood ratio for each of the remaining input bits, wherein the remaining input bits correspond to bits of a codeword received by the device over a cellular air interface from another device in the E-UTRAN; and decoding, via the n-bit decoder, n input bits of the codeword to obtain n output bits. 19. The method of claim 18 , wherein selecting the set of bit indices to be shortened comprises: identifying one or more of bit indices with associated outputs that are only a function of the corresponding input bits, wherein the set of bit indices to be shortened are selected from the identified one or more bit indices. 20. The method of claim 18 , further comprising: obtaining control information; and determining a codeword length and a code rate based on the obtained control information, wherein selecting the set of bit indices to be shortened comprises

Assignees

Inventors

Classifications

  • Decoding strategies · CPC title

  • Optimizing {the usage of the radio link}, e.g. header compression, information sizing {, discarding information (system modifying transmission characteristic according to link quality by modifying frame length H04L1/0007; dynamic adaptation of the packet size for flow control or congestion control H04L47/365)} · CPC title

  • H03M13/618Primary

    Shortening and extension of codes · CPC title

  • Error control coding in combination with rate matching · CPC title

  • Linear codes · CPC title

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What does patent US10911071B2 cover?
The present disclosure includes systems and methods for supporting polar codewords with variable polar codeword lengths. Variable codeword length codewords are communicated using an n-bit encoder/n-bit decoder having n inputs and n corresponding outputs. Each input and each corresponding output is associated with a bit index. A set of bit indices to be shortened are selected. The encoder encode…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H03M13/618. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 02 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).