Audio signal circuit with in-place bit-reversal

Patent metadata

Field	Value
Publication number	US-10908880-B2
Application number	US-201916657612-A
Country	US
Kind code	B2
Filing date	Oct 18, 2019
Priority date	Oct 19, 2018
Publication date	Feb 2, 2021
Grant date	Feb 2, 2021

Abstract

An integrated circuit for processing audio signals from a microphone assembly, combinations thereof and methods therefor, including a multi-issue processor configured to execute multiple instructions concurrently and connectable to a memory with a plurality of locations each represented by a corresponding index. Bit-reversal is performed on a sequence of audio data bits stored in memory by concurrently performing a load or store operation related to a first index and determining whether to perform a load operation for a second index.

First claim

What is claimed is:

1. A digital audio signal processing integrated circuit, the integrated circuit comprising:
a multi-issue processor configured to execute multiple instructions concurrently and connectable to a memory having a plurality of memory locations, each memory location represented by a corresponding index;
when connected to the memory, the processor configured to perform a bit-reverse operation on a sequence of audio data bits stored in the plurality of memory locations by:
executing a first instruction that configures the processor to perform a load or store operation related to a first index; and
executing a second instruction that configures the processor to determine whether to perform a load operation related to a second index;
wherein the processor executes the first instruction and the second instruction concurrently.

2. The integrated circuit of claim 1 , further comprising the memory having the plurality of memory locations, each memory locations represented by a corresponding index.

3. The integrated circuit of claim 1 , wherein the second instruction configures the processor to calculate a bit-reverse counterpart of the second index.

4. The integrated circuit of claim 3 , wherein the second instruction configures the processor to determine whether to perform the load operation related to the second index by comparing a value of the second index to a value of the bit-reverse counterpart of the second index.

5. The integrated circuit of claim 4 , wherein the second instruction configures the processor to perform the load operation related to the second index in response to a determination that the value of the second index is less than the value of the bit-reverse counterpart of the second index.

6. The integrated circuit of claim 1 , wherein the second instruction configures the processor to set a swap enable in response to determining whether to perform the load operation related to the second index.

7. The integrated circuit of claim 1 , wherein the integrated circuit is configured to store the sequence of audio data bits in the memory based on data received from an acoustic transducer based on acoustic activity sensed by the acoustic transducer.

8. The integrated circuit of claim 1 , wherein the processor is further configured to:
execute a third instruction that configures the processor to perform a load or store operation related to the first index; and
execute a fourth instruction that configures the processor to determine whether to perform a load operation related to a third index;
wherein the processor executes the third instruction and the fourth instruction concurrently.

9. The integrated circuit of claim 8 , wherein the processor is further configured to:
execute a fifth instruction that configures the processor to perform a store operation related to the first index; and
execute a sixth instruction that configures the processor to determine whether to perform a load operation related to a fourth index;
wherein the processor executes the fifth instruction and the sixth instruction concurrently.

10. A method for processing an audio signal using an integrated circuit comprising a memory and a multi-issue processor, the memory having a plurality of memory locations, each memory location represented by a corresponding index, the processor configured to execute multiple instructions concurrently, the method comprising:
storing, in the memory, a sequence of audio data bits; and
performing, using the processor, a bit-reverse operation on the sequence of audio data bits stored in the memory, performing the bit-reverse method comprising:
executing a first instruction that configures the processor to perform a load or store operation related to a first index; and
executing a second instruction that configures the processor to determine whether to perform a load operation related to a second index;
wherein the processor executes the first instruction and the second instruction concurrently.

11. The method of claim 10 , wherein executing the second instruction comprises calculating a bit-reverse counterpart of the second index.

12. The method of claim 11 , wherein executing the second instruction comprises determining whether to perform the load operation related to the second index by comparing a value of the second index to a value of the bit-reverse counterpart of the second index.

13. The method of claim 12 , wherein executing the second instruction comprises determining to perform the load operation related to the second index in response to determining that the value of the second index is greater than the value of the bit-reverse counterpart of the second index.

14. The method of claim 10 , wherein executing the second instruction comprises setting a swap enable in response to determining whether to perform the load operation related to the second index.

15. The method of claim 10 , further comprising receiving a signal from which the sequence of audio data bits is determined from an acoustic transducer configured to generate the signal based on acoustic activity sensed by the acoustic transducer.

16. The method of claim 10 , wherein performing the bit-reverse operation further comprises:
executing a third instruction that configures the processor to perform a load or store operation related to the first index; and
executing a fourth instruction that configures the processor to determine whether to perform a load operation related to a third index;
wherein the processor executes the third instruction and the fourth instruction concurrently.

17. The method of claim 16 , wherein performing the bit-reverse operation further comprises:
execute a fifth instruction that configures the processor to perform a store operation related to the first index; and
execute a sixth instruction that that configures the processor to determine whether to perform a load operation related to a fourth index;
wherein the processor executes the fifth instruction and the sixth instruction concurrently.

18. A microphone assembly comprising:
an acoustic transducer configured to sense acoustic activity and generate an electrical signal representative of the acoustic activity; and
an integrated circuit comprising:
a memory having a plurality of memory locations, each memory location represented by a corresponding index, the integrated circuit configured to store a sequence of audio data bits based on the electrical signal representative of the acoustic activity in the plurality of memory locations; and
a multi-issue processor configured to execute multiple instructions concurrently, wherein the processor is configured to perform a bit-reverse operation on the sequence of audio data bits by:
performing a load or store operation related to a first index; and
determining whether to perform a load operation related to a second index,
wherein the performing the load or store operation and the determining whether to perform the load operation occurs concurrently.

19. The microphone assembly of claim 18 , wherein the processor is configured to calculate a bit-reverse counterpart of the second index.

20. The microphone assembly of claim 18 , wherein the processor is configured to set a swap enable in response to determining whether to perform the load operation related to the second index.

Assignees

• Knowles Electronics Llc

Inventors

• Rub Leonardo

Classifications

• H04R1/08

  Mouthpieces; {Microphones;} Attachments therefor · CPC title

• H04R19/005

  using semiconductor materials · CPC title

• G06F16/61

  Indexing; Data structures therefor; Storage structures · CPC title

• G06F7/768 Primary

  Data position reversal, e.g. bit reversal, byte swapping · CPC title

• G06F17/142

  Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm · CPC title