Radio frequency circuitr having an integrated harmonic filter and a radio frequency circuit having transistors of different threshold voltages

Patent metadata

Field	Value
Publication number	US-10903806-B2
Application number	US-201615268598-A
Country	US
Kind code	B2
Filing date	Sep 18, 2016
Priority date	Sep 23, 2012
Publication date	Jan 26, 2021
Grant date	Jan 26, 2021

Abstract

An integrated circuit that includes a die with an active radio frequency (RF) unit embedded thereon; a first port for receiving an output signal from the active RF unit; a harmonic filter that comprises a first harmonic filter inductor; and a first RF inductive load that is electrically coupled to the first port and is magnetically coupled to the first harmonic filter inductor.

First claim

We claim:

1. A radio frequency (RF) power amplifier, comprising:
one or more input nodes for receiving one or more RF input signals;
one or more output nodes for driving a load;
one or more sub-amplifiers operatively coupled to said input node, each sub-amplifier operative to amplify its respective RF input signal to generate a sub-amplifier output signal;
wherein each sub-amplifier including a high amplifier unit operative to amplify RF input signals having first amplitudes, and a low amplifier unit operative to amplify RF input signals having second amplitudes;
wherein the first amplitudes exceed the second amplitudes;
wherein the high amplifier unit comprises a first transistor that has a first threshold voltage;
wherein the low amplifier unit comprises a second transistor that has a second threshold voltage; wherein the first threshold voltage exceeds the second threshold voltage; and
wherein for each sub-amplifier, the first transistor and second transistor are directly coupled to a single input node of the one or more input nodes, and are biased by a single bias signal.

2. The RF power amplifier according to claim 1 , wherein said RF power amplifier is fabricated using a semiconductor technology selected from the group consisting of complementary metal oxide semiconductor (CMOS), Gallium Arsenide (GaAs), Silicon Germanium (SiGe), Indium Gallium Phosphide (InGaP) and Gallium Nitride (GaN).

3. The RF power amplifier according to claim 1 wherein for each sub-amplifier, the first transistor and second transistor are connected, via a conductive path that does not include a direct current (DC) blocking capacitor, to a single input node of the one or more input nodes.

4. The RF power amplifier according to claim 1 , wherein said RF power amplifier is adapted to transmit signals conforming to a wireless standard selected from the group consisting of 802.11 wireless local area network (WLAN), long term evolution (LTE), worldwide interoperability for microwave access (WiMAX), high definition television (HDTV), third generation (3G) cellular, fourth generation (4G) cellular and Digital Enhanced Cordless Telecommunications (DECT).

5. The RF power amplifier according to claim 1 wherein for each sub-amplifier, a gate of the first transistor and a gate of the second transistor are directly coupled to each other.

6. The RF power amplifier according to claim 1 wherein the first transistor is a C class nonlinear amplifier.

7. The RF power amplifier according to claim 1 wherein the second transistor is an AB class linear amplifier.

8. The RF power amplifier according to claim 1 wherein the second transistor is an A class linear amplifier.

9. The RF power amplifier according to claim 1 wherein the first threshold voltage exceeds the second threshold voltage by more than 0.13 volts.

10. The RF power amplifier according to claim 1 further comprising a power combiner that is operatively coupled to said one or more sub-amplifiers and is adapted to magnetically combine the power generated by each sub-amplifier to generate an RF amplifier output signal.

11. The RF power amplifier according to claim 1 , wherein said one or more sub-amplifiers are integrated on same integrated circuit.

12. The RF power amplifier according to claim 1 , wherein each said sub-amplifier is operative to receive a differential RF input signal and generate a differential RF output signal;
wherein the differential RF input signal is a difference between a first RF input signal and a second RF input signal;
wherein a first voltage threshold transistor and a second voltage threshold transistor of a first sub-amplifier of the RF power amplifier are configured to directly receive the first RF input signal and are configured to be biased by a first bias signal from a first bias circuit;
wherein a first voltage threshold transistor and a second voltage threshold transistor of a second sub-amplifier of the RF power amplifier are configured to directly receive the second RF input signal and are configured to be biased by a second bias signal from a second bias circuit; and
wherein the first bias circuit differs from the second bias circuit.

Assignees

• Dsp Group Ltd

Inventors

• Anderson Sergey
• Pongratz Ron

Classifications

• H10W72/5445

  being orthogonal to a side surface of the chip, e.g. parallel arrangements · CPC title

• H10W44/241

  for passive devices or passive elements · CPC title

• H10W44/234

  Arrangements for impedance matching · CPC title

• H10W44/206

  Wires · CPC title

• H10W44/501

  Inductive arrangements (H10W44/20 takes precedence) · CPC title