Method of forming a photodiode

Patent metadata

Field	Value
Publication number	US-10903176-B2
Application number	US-201916257304-A
Country	US
Kind code	B2
Filing date	Jan 25, 2019
Priority date	Jul 26, 2016
Publication date	Jan 26, 2021
Grant date	Jan 26, 2021

Abstract

A self-destructing device includes a stressed substrate with a heater thermally coupled to the stressed substrate. The device includes a power source and trigger circuitry comprising a sensor and a switch. The sensor generates a trigger signal when exposed to a trigger stimulus. The switch couples the power source to the heater in response to the trigger signal When energized by the power source, the heater generates heat sufficient to initiate self-destruction of the stressed substrate.

First claim

The invention claimed is:

1. A method of forming a photodiode comprising:
depositing a first electrode layer over a substrate;
depositing a first doped layer of an active region over the first electrode layer;
depositing an intrinsic layer over the first doped layer;
depositing a second doped layer of the active region over the intrinsic layer;
depositing a second electrode layer over the second doped layer; and
patterning the first electrode layer, the first doped layer, the intrinsic layer, the second doped layer, and the second electrode layer to form the photodiode in not more than two mask steps, wherein the patterning comprises:
patterning the first electrode layer and the first doped layer in a first patterning step using a first mask;
patterning the second electrode layer, the second doped layer, and the intrinsic layer in a second patterning step using a second mask; and
during the second patterning step removing the first doped layer in unprotected regions in a self-aligned manner.

2. The method of claim 1 , further comprising forming an adhesion promoting surface on the substrate, wherein depositing the first electrode layer comprises depositing the first electrode layer on the adhesion promoting surface.

3. The method of claim 2 , wherein forming the adhesion promoting surface comprises depositing a layer of silicon oxide, silicon nitride, or silicon oxynitride by plasma-enhanced chemical vapor deposition.

4. The method of claim 1 , wherein the second electrode layer is configured to transmit a trigger stimulus to the active region of the photodiode.

5. The method of claim 1 , wherein depositing the second electrode layer comprises forming an optical filter that substantially attenuates wavelengths of light that are outside a wavelength band of a trigger stimulus and substantially passes wavelengths of light that are within the wavelength band of the trigger stimulus.

6. The method of claim 1 , wherein:
the substrate comprises a stressed substrate; and
the stressed substrate comprising at least one tensile stress layer having a residual tensile stress and at least one compressive stress layer having a residual compressive stress and being mechanically coupled to the at least one tensile stress layer such that the at least one tensile stress layer and the at least one compressive stress layer are self-equilibrating.

7. The method of claim 1 , wherein:
the substrate comprises a stressed substrate; and
the stressed substrate comprises chemically tempered glass.

8. A method of forming a photodiode comprising:
depositing a first electrode layer over a stressed substrate;
depositing a first doped layer of an active region over the first electrode layer;
depositing an intrinsic layer over the first doped layer;
depositing a second doped layer of the active region over the intrinsic layer;
depositing a second electrode layer over the second doped layer; and
patterning the first electrode layer, the first doped layer, the intrinsic layer, the second doped layer, and the second electrode layer to form the photodiode, wherein the patterning comprises:
patterning the first electrode layer and the first doped layer in a first patterning step using a first mask;
patterning the second electrode layer, the second doped layer, and the intrinsic layer in a second patterning step using a second mask; and
during the second patterning step removing the first doped layer in unprotected regions in a self-aligned manner.

9. The method of claim 8 , wherein the patterning comprises patterning the first electrode layer, the first doped layer, the intrinsic layer, the second doped layer, and the second electrode layer to form the photodiode in not more than two mask steps.

10. The method of claim 8 , further comprising forming an adhesion promoting surface on the stressed substrate, wherein depositing the first electrode layer comprises depositing the first electrode layer on the adhesion promoting surface.

11. The method of claim 10 , wherein forming the adhesion promoting surface comprises depositing a layer of silicon oxide, silicon nitride, or silicon oxynitride by plasma-enhanced chemical vapor deposition.

12. The method of claim 8 , wherein the second electrode layer is configured to transmit a trigger stimulus to the active region of the photodiode.

13. The method of claim 8 , wherein depositing the second electrode layer comprises forming an optical filter that substantially attenuates wavelengths of light that are outside a wavelength band of a trigger stimulus and substantially passes wavelengths of light that are within the wavelength band of the trigger stimulus.

14. The method of claim 8 , wherein the stressed substrate includes at least one tensile stress layer having a residual tensile stress and at least one compressive stress layer having a residual compressive stress and being mechanically coupled to the at least one tensile stress layer such that the at least one tensile stress layer and the at least one compressive stress layer are self-equilibrating.

15. The method of claim 8 , wherein the stressed substrate comprises chemically tempered glass.

16. A method of forming a photodiode comprising:
depositing a first electrode layer over a stressed substrate;
depositing a first doped layer of an active region over the first electrode layer;
depositing a second doped layer of the active region over the first doped layer;
depositing a second electrode layer over the second doped layer; and
patterning the first electrode layer, the first doped layer, the second doped layer, and the second electrode layer to form the photodiode, wherein the patterning comprises:
patterning the first electrode layer and the first doped layer in a first patterning step using a first mask;
patterning the second electrode layer and the second doped layer in a second patterning step using a second mask; and
during the second patterning step removing the first doped layer in unprotected regions in a self-aligned manner.

17. The method of claim 16 , wherein the patterning comprises patterning the first electrode layer, the first doped layer, the second doped layer, and the second electrode layer to form the photodiode in not more than two mask steps.

18. The method of claim 16 , further comprising forming an adhesion promoting surface on the stressed substrate, wherein depositing the first electrode layer comprises depositing the first electrode layer on the adhesion promoting surface.

19. The method of claim 18 , wherein forming the adhesion promoting surface comprises depositing a layer of silicon oxide, silicon nitride, or silicon oxynitride by plasma-enhanced chemical vapor deposition.

20. The method of claim 16 , wherein the second electrode layer is configured to transmit a trigger stimulus to the active region of the photodiode.

21. The method of claim 16 , wherein depositing the second electrode layer comprises forming an optical filter that substantially attenuates wavelengths of light that are outside a wavelength band of a trigger stimulus and substantially passes wavelengths of light that are within the wavelength band of the trigger stimulus.

22. The method of claim 16 , wherein the stressed substrate includes at least one tensile stress layer having a residual tensile stress and at least one compressive stress layer having a residual compressive stress and being mechanically coupled to the at least one tensile stress layer such that the at least one te

Assignees

• Palo Alto Res Ct Inc

Inventors

• Chua Christopher L
• Lu Jengping
• Whiting Gregory
• Limb Scott J
• Lujan Rene A
• Wang Qian

Classifications

• H10W70/692

  Ceramics or glasses · CPC title

• H10W44/00

  Electrical arrangements for controlling or matching impedance · CPC title

• H10W42/40 Primary

  protecting against tampering, e.g. unauthorised inspection or reverse engineering · CPC title

• H10W40/10

  Arrangements for heating · CPC title

• H10W20/493

  Fuses, i.e. interconnections changeable from conductive to non-conductive · CPC title