Multi-layer ceramic electronic component and method of producing the same

US10903008B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10903008-B2
Application numberUS-201916270230-A
CountryUS
Kind codeB2
Filing dateFeb 7, 2019
Priority dateFeb 9, 2018
Publication dateJan 26, 2021
Grant dateJan 26, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A multi-layer ceramic electronic component includes a multi-layer unit and a side margin. The multi-layer unit includes a capacitance forming unit, a cover, and a side surface. The capacitance forming unit includes ceramic layers that are laminated in a first direction and contain boron, and internal electrodes disposed between the ceramic layers. The cover covers the capacitance forming unit in the first direction. The side surface faces in a second direction orthogonal to the first direction. The side margin covers the side surface in the second direction and has a lower boron concentration than a boron concentration of the ceramic layers.

First claim

Opening claim text (preview).

What is claimed is: 1. A multi-layer ceramic electronic component, comprising a multi-layer unit including a capacitance forming unit including ceramic layers that are laminated in a first direction and contain boron, and internal electrodes disposed between the ceramic layers, a cover that covers the capacitance forming unit in the first direction, and a side surface that faces in a second direction orthogonal to the first direction; and a side margin that covers the side surface in the second direction, wherein the ceramic layers include dielectric ceramics having a Perovskite structure as a main component and further include boron, wherein the side margin includes a dielectric ceramic having a Perovskite structure as a main component and further includes boron, and wherein the side margin has a lower boron concentration than a boron concentration of the ceramic layers. 2. The multi-layer ceramic electronic component according to claim 1 , wherein the capacitance forming unit includes a first region disposed at the center portion in the second direction, and a second region that is disposed between the first region and the side margin, the boron concentration of the ceramic layers in the second region being lower than the boron concentration of the ceramic layers in the first region and higher than the boron concentration of the side margin. 3. The multi-layer ceramic electronic component according to claim 2 , wherein the ceramic layers disposed in the second region has the boron concentration gradually decreasing from a side of the first region toward a side of the side margin. 4. The multi-layer ceramic electronic component according to claim 2 , wherein a dimension of the second region in the second direction is 1 μm or more and is equal to or smaller than 20% of the dimension, in the second direction, of a ceramic body that comprises the multi-layer unit and a pair of side margins. 5. The multi-layer ceramic electronic component according to claim 1 , wherein the dielectric ceramics of the ceramic layers and of the side margin comprise at least one of strontium titanate (SrTiO 3 ) based material, a calcium titanate (CaTiO 3 ) based material, a magnesium titanate (MgTiO 3 ) based material, a calcium zirconate (CaZrO 3 ) based material, a calcium zirconate titanate (Ca(Zr,Ti)O 3 ) based material, a barium zirconate (BaZrO 3 ) based material, and a titanium oxide (TiO 2 ) based material. 6. The multi-layer ceramic electronic component according to claim 5 , wherein the ceramic layers and the side margin have a common main component.

Assignees

Inventors

Classifications

  • B32B37/10Primary

    characterised by the pressing technique, e.g. using action of vacuum or fluid pressure · CPC title

  • Ceramics · CPC title

  • characterised by a sequence of laminating steps, e.g. by adding new layers at consecutive laminating stations · CPC title

  • electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

  • Conductive · CPC title

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What does patent US10903008B2 cover?
A multi-layer ceramic electronic component includes a multi-layer unit and a side margin. The multi-layer unit includes a capacitance forming unit, a cover, and a side surface. The capacitance forming unit includes ceramic layers that are laminated in a first direction and contain boron, and internal electrodes disposed between the ceramic layers. The cover covers the capacitance forming unit i…
Who is the assignee on this patent?
Taiyo Yuden Kk
What technology area does this patent fall under?
Primary CPC classification B32B37/10. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Jan 26 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).