Data sharing system and data sharing method therefor

Patent metadata

Field	Value
Publication number	US-10901815-B2
Application number	US-201916693918-A
Country	US
Kind code	B2
Filing date	Nov 25, 2019
Priority date	Jun 26, 2017
Publication date	Jan 26, 2021
Grant date	Jan 26, 2021

Abstract

A data sharing system may include a storage module and at least two processing modules. The at least two processing modules may share the storage module and the at least two processing modules communicate to implement data sharing. A data sharing method for the data sharing system is provided. According to the disclosure, a storage communication overhead may be reduced, and a data access delay may be effectively reduced.

First claim

What is claimed:

1. A data sharing system, comprising:
a first processing module that includes a first internal storage unit; and
a second processing module configured to transmit, to the first processing module, a request signal that includes a data address in the first internal storage unit,
wherein the first processing module is configured to:
retrieve, upon receiving the request signal, data at the data address in the first internal storage unit, and
transmit the retrieved data to the second processing module;

wherein each of the first processing module and the second processing module includes a physical processor that includes an artificial neural network processor configured to perform artificial neural network forward computations,
wherein the artificial neural network processor includes an instruction caching unit configured to read an instruction from a Direct Memory Access (DMA) and cache the read instruction,
wherein the artificial neural network processor includes a controlling unit configured to read the instruction from the instruction caching unit and decode the instruction into one or more microinstructions,
wherein the artificial neural network processor further includes:
a primary computation module configured to transmit an input neuron vector of a current layer to one or more secondary computation modules via an H tree module for reverse training of each layer of a neural network,
wherein the H tree module is configured to merge one or more output neuron values from the one or more secondary computation modules into an intermediate result vector, and
wherein the primary computation module is further configured to generate a final result vector based on the intermediate result vector.

2. The data sharing system of claim 1 , wherein the first processing module is further configured to transmit an acknowledge signal to the second processing module upon receiving the request signal.

3. The data sharing system of claim 1 , wherein the DMA is further configured to write data into corresponding data caching units of the primary computation module and each secondary computation module from an external address space or read data into the external address space from the data caching units.

4. The data sharing system of claim 1 , wherein the artificial neural network processor further includes:
a primary computation module connected with a branch processing module,
wherein the branch processing module is further connected to multiple secondary processing modules, and
wherein the branch processing module is configured to forward data or instructions between the primary computation module and the secondary processing modules.

5. A method for data sharing, comprising:
transmitting, by a second processing module to a first processing module, a request signal that includes a data address in a first internal storage unit in the first processing module,
wherein each of the first processing module and the second processing module includes a physical processor that includes an artificial neural network processor configured to perform artificial neural network forward computations and
wherein the artificial neural network processor includes an instruction caching unit configured to read an instruction from a Direct Memory Access (DMA) and cache the read instruction;

retrieving, by the first processing module, upon receiving the request signal, data at the data address in the first internal storage unit;
transmitting, by the first processing module, the retrieved data to the second processing module;
reading, by a controlling unit of the artificial neural network processor, the instruction from the instruction caching unit and decode the instruction into one or more microinstructions;
transmitting, by a primary computation module of the artificial neural network processor, an input neuron vector of a current layer to one or more secondary computation modules via an H tree module for reverse training of each layer of a neural network;
merging, by the H tree module, one or more output neuron values from the one or more secondary computation modules into an intermediate result vector; and
generating, by the primary computation module, a final result vector based on the intermediate result vector.

6. The method of claim 5 , further comprising transmitting, by the first processing module,
an acknowledge signal to the second processing module upon receiving the request signal.

7. The method of claim 5 , further comprising writing, by the DMA, data into corresponding data caching units of the primary computation module and each secondary computation module from an external address space.

8. The method of claim 5 , further comprising reading, by the DMA, data into the external address space from the data caching units.

9. The method of claim 5 , wherein the artificial neural network processor further includes a primary computation module connected with a branch processing module, wherein the branch processing module is further connected to multiple secondary processing modules.

10. The method of claim 9 , further comprising: forwarding, by the branch processing module, data or instructions between the primary computation module and the secondary processing modules.

Assignees

• Shanghai Cambricon Inf Tech Co Ltd

Inventors

• Chen Tianshi
• Zhou Shengyuan
• Liu Shaoli

Classifications

• G06N3/045

  Combinations of networks · CPC title

• G06N3/0475

  Generative networks · CPC title

• G06N3/0495

  Quantised networks; Sparse networks; Compressed networks · CPC title

• G06N3/09

  Supervised learning · CPC title

• G06N3/094

  Adversarial learning · CPC title