Physically unclonable function implemented with spin orbit coupling based magnetic memory

Patent metadata

Field	Value
Publication number	US-10897364-B2
Application number	US-201715846045-A
Country	US
Kind code	B2
Filing date	Dec 18, 2017
Priority date	Dec 18, 2017
Publication date	Jan 19, 2021
Grant date	Jan 19, 2021

Abstract

Spin Hall Effect (SHE) magneto junction memory cells (e.g., magnetic tunneling junction (MTJ) or spin valve based memory cells) are used to implement high entropy physically unclonable function (PUF) arrays utilizing stochastics interactions of both parameter variations of the SHE-MTJ structures as well as random thermal noises. An apparatus is provided which comprises: an array of PUF devices, wherein an individual device of the array comprises a magnetic junction and an interconnect, wherein the interconnect comprises a spin orbit coupling material; a circuitry to sense values stored in the array, and to provide an output; and a comparator to compare the output with a code.

First claim

We claim:

1. An apparatus comprising:
an array of physically unclonable function (PUF) devices, wherein an individual device of the array comprises a magnetic junction and an interconnect, and wherein the interconnect comprises a spin orbit material;
a circuitry to sense values stored in the array, and to provide a unique output; and
a comparator to compare the unique output with an authentication code, wherein the magnetic junction comprises: a stack of structures including:
a first structure comprising a magnet with unfixed perpendicular magnetic anisotropy (PMA), wherein the first structure has an anisotropy axis perpendicular to a plane of a device;
a second structure comprising one of a dielectric or metal; and
a third structure comprising a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the second structure is between the first and third structures.

2. The apparatus of claim 1 , wherein the circuitry is a first circuitry, wherein the apparatus comprises a second circuitry to initialize all the devices of the array to one of logic 0 or logic 1.

3. The apparatus of claim 2 comprises a third circuitry to apply a programmable current pulse width to the devices of the array to write a logic 1 to the devices.

4. The apparatus of claim 3 comprises a fourth circuitry to select memory cells to read from the array, via the first circuitry, the output based on a challenge input.

5. The apparatus of claim 1 , wherein the code is to be stored on a server and is to be provided to the comparator.

6. The apparatus of claim 1 , wherein the magnetic junctions of the array of PUF devices have an average switching probability of substantially 50%.

7. The apparatus of claim 1 , wherein the first and second structures include one or more of Co, Fe, Ge, or Ga or Heusler alloys.

8. The apparatus of claim 7 , wherein the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.

9. The apparatus of claim 1 comprises a second device controllable by a word-line, wherein the second device includes a source and drain, wherein one of the source or drain is coupled to the interconnect, and wherein one of the drain or source is coupled to a select line.

10. The apparatus of claim 9 , wherein the interconnect is coupled to a second select line via a third device.

11. The apparatus of claim 1 , wherein the magnetic junction comprises: a fourth structure between the first and second structures, wherein the fourth structure includes one or more of: Ru, Os, Hs, or Fe.

12. The apparatus of claim 11 , wherein the magnetic junction comprises a fifth structure between the second and third structures, and wherein the fifth structure includes one or more of: Ru, Os, Hs, or Fe.

13. The apparatus of claim 1 , wherein the dielectric comprises: Mg and O.

14. The apparatus of claim 1 , wherein the magnetic junction is one of a spin valve or a magnetic tunneling junction (MTJ).

15. The apparatus of claim 1 comprises a bit-line coupled to the magnetic junction.

16. The apparatus of claim 1 , wherein the interconnect is to generate spin Hall effect (SHE).

17. The apparatus of claim 1 , wherein the spin orbit material includes one or more or: (β-Tantalum (β-Ta), Ta, β-Tungsten (β-W), W, Platinum (Pt), Copper (Cu) doped with elements including on of Iridium, Bismuth or elements of 3d, 4d, 5d and 4f, 5f periodic groups, Ti, S, W, Mo, Se, B, Sb, Re, La, C, P, La, As, Sc, O, Bi, Ga, Al, Y, In, Ce, Pr, Nd, F, Ir, Mn, Pd, or Fe.

18. The apparatus of claim 1 , wherein the spin orbit material includes one of a 2D material or a 3D material, wherein the 3D material is thinner than the 2D material.

19. The apparatus of claim 1 , wherein the spin orbit material includes materials that exhibit Rashba-Bychkov effect.

20. A system comprising:
a memory;
a processor coupled to the memory, the processor comprising:
an array of physically unclonable function (PUF) devices, wherein an individual device of the array comprises a magnetic junction and an interconnect, wherein the interconnect comprises a spin orbit material;
a circuitry to sense values stored in the array, and to provide a unique output; and
a comparator to compare the unique output with an authentication code; and

a wireless interface to allow the processor to communicate with another device, wherein the magnetic junction comprises: a stack of structures including:
a first structure comprising a magnet with unfixed perpendicular magnetic anisotropy (PMA), wherein the first structure has an anisotropy axis perpendicular to a plane of a device;
a second structure comprising one of a dielectric or metal; and
a third structure comprising a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the second structure is between the first and third structures.

21. The system of claim 20 , wherein the circuitry is a first circuitry, and wherein the processor comprises:
a second circuitry to initialize all the devices of the array to one of logic 0 or logic 1;
a third circuitry to apply a programmable current pulse width to the devices of the array to write a logic 1 to the devices; and
a fourth circuitry to select memory cells to read from the array, via the first circuitry, the output based on a challenge input.

22. The system of claim 20 , wherein the code is to be stored on a server and is to be provided to the comparator, and wherein the magnetic junctions of the array of PUF devices have an average switching probability of substantially 50%.

23. An apparatus comprising:
a first circuitry to initialize, an array of physically unclonable function (PUF) devices, to a logic 0 or logic 1, wherein an individual device of the array comprises a magnetic junction and an interconnect, wherein the interconnect comprises a spin orbit material;
a second circuitry to apply a current pulse to the interconnect to write one of a logic 1 or logic 0 to the array;
a third circuitry to disable a write operation for the array in response to applying the current pulse, wherein the magnetic junction comprises: a stack of structures including:
a first structure comprising a magnet with unfixed perpendicular magnetic anisotropy (PMA), wherein the first structure has an anisotropy axis perpendicular to a plane of a device:
a second structure comprising one of a dielectric or metal; and
a third structure comprising a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the second structure is between the first and third structures.

24. The apparatus of claim 23 comprises:
a fourth circuitry to store data stored in the devices in response to applying the current pulse;
a fifth circuitry to select devices from the array for reading, wherein the selecting is according to a challenge input;
a seventh circuitry to read data stored in the selected devices; and
an eighth circuitry to compare the read data with an authentication code.

Assignees

• Intel Corp

Inventors

• De Vivek
• Ravichandran Krishnan
• Krishnamurthy Harish
• Ahmed Khondker
• Vangal Sriram
• Vaidya Vaibhav
• Majumder Turbo
• Schaef Christopher
• Kim Suhwan
• Liu Xiaosen
• Desai Nachiket

Classifications

• G09C1/00

  Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system (cryptographic typewriters G09C3/00) · CPC title

• H04L9/3278 Primary

  using physically unclonable functions [PUF] · CPC title