Buck converter with inductor sensor

US10897203B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10897203-B2
Application numberUS-201916375391-A
CountryUS
Kind codeB2
Filing dateApr 4, 2019
Priority dateApr 4, 2019
Publication dateJan 19, 2021
Grant dateJan 19, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A buck converter may operate in a low power mode or a high power mode based on a power requirements of a load. In the high power mode, modifications to increase frequency response include a higher polling frequency for a comparator, a lower impedance divider in a feedback circuit, a higher biasing current for a comparator, and larger switches for providing current to a reactive step-down circuit of the buck converter. In the low power mode these modifications are reversed. The buck converter may make use of an improved strong arm comparator and a circuit for sensing presence of an inductor in the reactive step-down circuit.

First claim

Opening claim text (preview).

The invention claimed is: 1. An apparatus comprising: a first drive circuit coupled to a reactive step-down circuit; a second drive circuit coupled to the reactive step-down circuit; and a sensing circuit coupled to a first node in the reactive step-down circuit and having an output line, the sensing circuit programmed to assert the output line when a reactive component is not connected between the first node and a second node of the reactive step-down circuit, wherein the sensing circuit further includes a polling input, the sensing circuit programmed to evaluate whether the reactive component is connected between the first node and the second node in response to asserting of the polling input; wherein the sensing circuit comprises: a first transistor coupling the first node to a resistor connected to ground and having a first gate of the first transistor coupled to the polling input such that the first transistor is turned on when the polling input is asserted; and a second transistor coupling the second node to a drive voltage and having a second gate of the second transistor coupled to the polling input such that the second transistor is turned on when the polling input is asserted; and wherein the output line is connected to the first node. 2. The apparatus of claim 1 , wherein the sensing circuit is programmed to assert a signal on the output line when an inductor is not coupled between the first node and the second node. 3. The apparatus of claim 2 , wherein the first drive circuit is a buck converter switching circuit. 4. The apparatus of claim 3 , wherein the second drive circuit is a low drop out (LDO) converter switching circuit. 5. The apparatus of claim 4 , further comprising a controller coupled to the output line and to the first drive circuit and the second drive circuit, the controller programmed to enable the first drive circuit when the signal is asserted on the output line. 6. The apparatus of claim 1 , wherein the sensing circuit is further programmed to place one or more switches in the first drive circuit in a high impedance state in response to asserting of the polling input. 7. The apparatus of claim 1 , further comprising a comparator coupling the output line to the first node. 8. A method comprising: providing a first drive circuit coupled to a reactive step-down circuit; providing a second drive circuit coupled to the reactive step-down circuit; evaluating whether a reactive component is coupled between a first node in the reactive step-down circuit and a second node of the reactive step-down circuit; and when the reactive component is sensed, operating the reactive step-down circuit using the first drive circuit, wherein evaluating whether the reactive component is coupled between the first node and the second node comprises: receiving a polling input; turning on a first transistor coupling the first node to a resistor coupled to ground and having a first gate of the first transistor coupled to the polling input such that the first transistor is turned on in response to the polling input; turning on a second transistor coupling the second node to a drive voltage and having a second gate of the second transistor coupled to the polling input such that the second transistor is turned on in response to the polling input; and sensing a voltage on the first mode. 9. The method of claim 8 , further comprising when the reactive component is not sensed, operating the reactive step-down circuit using the second drive circuit. 10. The method of claim 9 , wherein the first drive circuit is a buck converter switching circuit; and wherein evaluating whether the reactive component is coupled between the first node and the second node comprises evaluating whether an inductor is coupled between the first node and the second node. 11. The method of claim 10 , wherein the second drive circuit is a low drop out (LDO) converter switching circuit. 12. The method of claim 11 , further comprising: providing an output to a controller when the reactive component is sensed; and enabling, by the controller, the first drive circuit when the reactive component is sensed. 13. The method of claim 8 , further comprising placing one or more switches in the first drive circuit in a high impedance state in response to the polling input. 14. The method of claim 12 , further comprising: sensing, by the controller, an output of a comparator coupled to the first node.

Assignees

Inventors

Classifications

  • Arrangements for modifying reference values, feedback values or error values in the control loop of a converter · CPC title

  • Devices or circuits for detecting current in a converter · CPC title

  • Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode · CPC title

  • Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title

  • using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

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What does patent US10897203B2 cover?
A buck converter may operate in a low power mode or a high power mode based on a power requirements of a load. In the high power mode, modifications to increase frequency response include a higher polling frequency for a comparator, a lower impedance divider in a feedback circuit, a higher biasing current for a comparator, and larger switches for providing current to a reactive step-down circui…
Who is the assignee on this patent?
Ambiq Micro Inc
What technology area does this patent fall under?
Primary CPC classification H02M3/1588. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 19 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).