Image processing device and method

Patent metadata

Field	Value
Publication number	US-10893269-B2
Application number	US-201716094261-A
Country	US
Kind code	B2
Filing date	May 25, 2017
Priority date	Jun 8, 2016
Publication date	Jan 12, 2021
Grant date	Jan 12, 2021

Abstract

There is provided an image processing device and method capable of suppressing a decrease in subjective image quality. A size of a current block for a prediction process is set according to a size of a peripheral block situated on a periphery of the current block. The prediction process is to generate a predicted image of an image to be encoded. An intra prediction process is performed on the current block that has been set and the predicted image is generated. The image to be encoded is encoded using the predicted image that has been generated. The present disclosure can be applied to, for example, an image processing device, an image encoding device, or an image decoding device.

First claim

The invention claimed is:

1. An image processing device comprising:
a block setting unit configured to set a size of a current block for an intra prediction process according to a size of a peripheral block situated on a periphery of the current block, the prediction process generating a predicted image of an image to be encoded;
an intra prediction unit configured to perform the intra prediction process on the current block set by the block setting unit and generate the predicted image; and
an encoding unit configured to encode the image to be encoded using the predicted image generated by the intra prediction unit,
wherein the block setting unit sets the size of the current block for the prediction process according to a first block division mode set when the image to be encoded is an artificial image generated artificially and according to a second block division mode set when the image to be encoded is a normal image,
wherein the first block division mode and the second block division mode are different,
wherein, in the first block division mode, the block setting unit sets the size of the current block according to the size of the peripheral block, and
wherein the block setting unit, the intra prediction unit, and the encoding unit are each implemented via at least one processor.

2. The image processing device according to claim 1 ,
wherein a plurality of the peripheral blocks includes an upper block adjacent to an upper side of the current block and a left block adjacent to a left side of the current block, and
in a case where a size of the upper block and a size of the left block are identical to each other, the block setting unit sets the size of the current block to be identical to the size of the upper block and the size of the left block.

3. The image processing device according to claim 2 ,
wherein in a case where the size of the upper block and the size of the left block are not identical to each other, the block setting unit sets the size of the current block to be equal to or smaller than the size of one of the upper block and the left block that is smaller in size than the other of the upper block and the left block.

4. The image processing device according to claim 1 ,
wherein the peripheral block is a reference block whose pixel value is referred to in the current block, and
the block setting unit sets the size of the current block to be identical to a size of the reference block.

5. The image processing device according to claim 1 ,
wherein the peripheral block is a reference block whose pixel value is referred to in the current block, and
the block setting unit sets the size of the current block to be smaller than a size of the reference block.

6. The image processing device according to claim 1 , further comprising:
an artificial image determining unit configured to determine whether or not the image to be encoded is the artificial image generated artificially,
wherein the artificial image determining unit is implemented via at least one processor.

7. The image processing device according to claim 6 ,
wherein in a case where a user specifies that the image to be encoded is the artificial image, the artificial image determining unit determines that the image to be encoded is the artificial image.

8. The image processing device according to claim 6 ,
wherein in a case where a monotonic increase or a monotonic decrease in pixel values occurs in a horizontal direction or a vertical direction, the artificial image determining unit determines that the image to be encoded is the artificial image.

9. The image processing device according to claim 6 ,
wherein in a case where a number of high-frequency components is smaller than a predetermined criterion, the artificial image determining unit determines that the image to be encoded is the artificial image.

10. The image processing device according to claim 6 ,
wherein in a case where a variation of pixel values is less than a predetermined criterion, the artificial image determining unit determines that the image to be encoded is the artificial image.

11. The image processing device according to claim 1 , further comprising:
an area determining unit configured to determine whether or not the current block is an artificial image area constituted by an artificial image generated artificially,
wherein in a case where the area determining unit determines that the current block is the artificial image area, the block setting unit sets the size of the current block according to the size of the peripheral block, and
wherein the area determining unit is implemented via at least one processor.

12. The image processing device according to claim 11 ,
wherein in a case where a user specifies that the current block is the artificial image area, the area determining unit determines that the current block is the artificial image area.

13. The image processing device according to claim 11 ,
wherein in a case where a monotonic increase or a monotonic decrease in pixel values occurs in a horizontal direction or a vertical direction in the current block, the area determining unit determines that the current block is the artificial image area.

14. The image processing device according to claim 11 ,
wherein in a case where a number of high-frequency components in the current block is smaller than a predetermined criterion, the area determining unit determines that the current block is the artificial image area.

15. The image processing device according to claim 11 ,
wherein in a case where a variation of pixel values in the current block is less than a predetermined criterion, the area determining unit determines that the current block is the artificial image area.

16. The image processing device according to claim 1 , further comprising:
a first computing unit configured to calculate a difference in the current block between the image to be encoded and the predicted image generated by the intra prediction unit and generate a residual image;
an orthogonal transform unit configured to perform an orthogonal transform on the residual image obtained by the first computing unit; and
a quantization unit configured to quantize an orthogonal transform coefficient of the residual image obtained by the orthogonal transform unit,
wherein the encoding unit encodes a quantized coefficient of the orthogonal transform coefficient obtained by the quantization unit, and
wherein the first computing unit, the orthogonal transform unit, and the quantization unit are each implemented via at least one processor.

17. The image processing device according to claim 16 , further comprising:
an inverse quantization unit configured to perform an inverse quantization on the quantized coefficient obtained by the quantization unit;
an inverse orthogonal transform unit configured to perform an inverse orthogonal transform on an orthogonal transform coefficient obtained by the inverse quantization unit;
a second computing unit configured to add the predicted image generated by the intra prediction unit to a residual image obtained by the inverse orthogonal transform unit and generate a local decoded image; and
a deblocking filtering unit configured to apply a deblocking filter to the decoded image obtained by the second computing unit,
wherein the inverse quantization unit, the inverse orthogonal transform unit, the second computing unit, and the deblocking filtering unit are each implemented via at least one processor.

18. The image processing device according to claim 1 ,
wherein the

Assignees

• Sony Corp

Inventors

• Morigami Yoshitaka
• Lu Shuo
• Nagumo Takefumi

Classifications

• H04N19/14

  Coding unit complexity, e.g. amount of activity or edge presence estimation (H04N19/146 takes precedence) · CPC title

• H04N19/159

  Prediction type, e.g. intra-frame, inter-frame or bidirectional frame prediction · CPC title

• H04N19/136

  Incoming video signal characteristics or properties · CPC title

• H04N19/176

  the region being a block, e.g. a macroblock · CPC title

• H04N19/119 Primary

  Adaptive subdivision aspects, e.g. subdivision of a picture into rectangular or non-rectangular coding blocks · CPC title