Current sense apparatus and method

Patent metadata

Field	Value
Publication number	US-10892645-B2
Application number	US-201916585033-A
Country	US
Kind code	B2
Filing date	Sep 27, 2019
Priority date	Feb 8, 2018
Publication date	Jan 12, 2021
Grant date	Jan 12, 2021

Abstract

A device includes a positive current sense amplifier having two inputs connected to a drain and a source of a power switch respectively through a plurality of positive current sense switches, and a negative current sense amplifier having two inputs connected to the drain and the source of the power switch respectively through a plurality of negative current sense switches.

First claim

What is claimed is:

1. A device comprising:
a positive current sense amplifier having two inputs connected to a drain and a source of a power switch respectively through a plurality of positive current sense switches; and
a negative current sense amplifier having two inputs connected to the drain and the source of the power switch respectively through a plurality of negative current sense switches.

2. The device of claim 1 , further comprising:
a current sense processing apparatus connected to the positive current sense amplifier and the negative current sense amplifier respectively.

3. The device of claim 2 , wherein the current sense processing apparatus comprises a first current mirror, a second current mirror and a third current mirror, and wherein:
the first current mirror is configured to convert an output signal of the positive current sense amplifier into a first sink current;
the second current mirror is configured to convert an output signal of the negative current sense amplifier into a second sink current; and
the third current mirror is configured to convert the first sink current into a first source current.

4. The device of claim 3 , wherein:
the first current mirror is connected to an output of the positive current sense amplifier through a first p-type transistor; and
the second current mirror is connected to an output of the negative current sense amplifier through a second p-type transistor.

5. The device of claim 3 , wherein:
the first source current and the second sink current are fed into a filter connected to a common node of the second current mirror and the third current mirror.

6. The device of claim 3 , wherein:
the second current mirror is a first variable gain current mirror comprising a plurality of first transistor-switch networks connected in parallel; and
the third current mirror is a second variable gain current mirror comprising a plurality of second transistor-switch networks connected in parallel.

7. The device of claim 3 , wherein:
the current sense processing apparatus comprises a bias current source connected to a common node of the second current mirror and the third current mirror, and wherein the bias current source is configured to reduce temperature coefficient induced errors.

8. The device of claim 1 , wherein:
the power switch is a high-side switch of a leg of a full-bridge in a wireless power transfer system.

9. The device of claim 1 , wherein:
the power switch is a low-side switch of a leg of a full-bridge in a wireless power transfer system.

10. The device of claim 1 , wherein:
a first positive current sense switch is connected between the drain of the power switch and an inverting input of the positive current sense amplifier;
a second positive current sense switch is connected between the source of the power switch and a non-inverting input of the positive current sense amplifier;
a first negative current sense switch is connected between the drain of the power switch and a non-inverting input of the negative current sense amplifier; and
a second negative current sense switch is connected between the source of the power switch and an inverting input of the negative current sense amplifier.

11. A system comprising:
a first power switch and a second power switch connected in series between a first voltage potential and a second voltage potential;
an inductor connected to a common node of the first power switch and the second power switch; and
a current sense apparatus connected to a drain terminal and a source terminal of one of the first power switch and the second power switch, wherein the current sense apparatus comprises:
a positive current sense device configured to sense a current flowing from the drain terminal to the source terminal; and
a negative current sense device configured to sense a current flowing from the source terminal to the drain terminal.

12. The system of claim 11 , wherein:
the first voltage potential is connected to a power source;
the second voltage potential is connected to ground;
the positive current sense device comprises a first amplifier, a first sense switch and a second sense switch; and
the negative current sense device comprises a second amplifier, a third sense switch and a fourth sense switch.

13. The system of claim 12 , wherein:
the first sense switch is connected between the drain terminal and an inverting input of the first amplifier;
the second sense switch is connected between the source terminal and a non-inverting input of the first amplifier;
the third sense switch is connected between the drain terminal and a non-inverting input of the second amplifier; and
the fourth sense switch is connected between the source terminal and an inverting input of the second amplifier.

14. The system of claim 12 , further comprising:
a current sense processing apparatus connected to outputs of the positive current sense device and the negative current sense device; and
an output filter connected to an output of the current sense processing apparatus.

15. The system of claim 14 , wherein the current sense processing apparatus comprises:
a positive current sense processing circuit comprising a first current mirror and a first transistor connected in series, and wherein a gate of the first transistor is connected to an output of the first amplifier, a first drain/source terminal of the first transistor is connected to an inverting input of the first amplifier and a second drain/source terminal of the first transistor is connected to the first current mirror; and
a negative current sense processing circuit comprising a second current mirror and a second transistor connected in series, and wherein a gate of the second transistor is connected to an output of the second amplifier, a first drain/source terminal of the second transistor is connected to an inverting input of the second amplifier and a second drain/source terminal of the second transistor is connected to the second current mirror.

16. The system of claim 15 , further comprising:
a third current mirror connected to the first current mirror, wherein the third current mirror is configured to convert a first sink current generated by the first current mirror into a first source current, wherein the first source current and a second sink current generated by the second current mirror are fed into the output filter.

17. A system comprising:
a first power switch and a second power switch connected in series between a power source and ground;
an inductor connected to a common node of the first power switch and the second power switch; and
a current sense apparatus connected to a drain terminal and a source terminal of the first power switch, wherein the current sense apparatus comprises a positive current sense device configured to sense a current flowing from the drain terminal to the source terminal, and a negative current sense device configured to sense a current flowing from the source terminal to the drain terminal.

18. The system of claim 17 , wherein:
the positive current sense device comprises a first sense switch, a second sense switch and a first amplifier, and wherein the first sense switch is connected between the drain terminal of the first power switch and an inverting input of the first amplifier, and the second sense switch is connected between the source terminal of the first power switch and a non-inverting input of the first amplifier; and
the negative current sense device comprises a third sense switch, a fourth sense switch and a second amp

Assignees

• X2 Power Tech Limited
• Nuvolta Tech Hefei Co Ltd

Inventors

• Liu Sichao
• Huang Jinbiao
• Yuan Dongdong

Classifications

• H02J7/62

  against overcurrent · CPC title

• G01R19/00 Primary

  Arrangements for measuring currents or voltages or for indicating presence or sign thereof (G01R5/00 takes precedence; for measuring bioelectric currents or voltages A61B5/24) · CPC title

• G01R19/0092 Primary

  Measuring current only · CPC title

• H02J50/10 Primary

  using inductive coupling · CPC title

• G01R19/32

  Compensating for temperature change · CPC title