Electronic device comprising a support substrate and an encapsulating cover for an electronic component

US10892201B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10892201-B2
Application numberUS-202016788627-A
CountryUS
Kind codeB2
Filing dateFeb 12, 2020
Priority dateSep 18, 2017
Publication dateJan 12, 2021
Grant dateJan 12, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A support substrate has a face above which at least one electronic component is fixed. A peripheral area of the face includes an annular local metal layer. An encapsulating cover for the electronic component includes a peripheral wall having an end edge that is mounted above the peripheral area. The annular metal local layer includes, at the periphery thereof, a series of spaced-apart teeth with notches formed therebetween. The teeth extend as far as the peripheral edge of the support substrate.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method, comprising: forming annular metal local layers on a face of a support substrate, the annular metal local layers surrounding locations for receiving and mounting an electronic component; forming a plurality of notches in the annular metal local layers to define a plurality of spaced-apart teeth; mounting a plurality of encapsulating covers to the support substrate, each encapsulating cover mounted above a corresponding one of the locations with an end edge of a peripheral wall of each encapsulating cover attached to the annular metal local layer; and then cutting, between and at a distance from adjacent ones of the encapsulating covers, along the annular metal local layers and through the support substrate and the teeth of said annular local metal layers to obtain a plurality of individual electronic devices. 2. The method of claim 1 , wherein forming the plurality of notches comprises forming each notch to be surrounded by portions of the annular metal local layers. 3. The method of claim 1 , wherein mounting the plurality of encapsulating covers comprises aligning the end edge of the peripheral wall of each encapsulation cover with the notches. 4. A method, comprising: forming an annular metal local layer on a face of a support substrate, the annular metal local layer surrounding a location for receiving and mounting an electronic component; forming a plurality of notches in the annular metal local layer; mounting an encapsulating cover to the support substrate over said location, wherein said encapsulating cover includes a front wall and a peripheral wall extending from a surface of the front wall, wherein mounting comprises attaching an end edge of said peripheral wall of the encapsulating cover to the annular metal local layer; and cutting along said notches and at a distance from an outer peripheral surface of the peripheral wall through the annular metal local layer and the support substrate to define a plurality of teeth in the annular metal local layer that are spaced apart from each other by notches. 5. The method of claim 4 , wherein forming the plurality of notches comprises forming each notch to be surrounded by portions of the annular metal local layer. 6. The method of claim 4 , wherein mounting the encapsulating cover comprises aligning the end edge of the peripheral wall with the notches. 7. The method of claim 1 , wherein each encapsulating cover includes a front wall and said peripheral wall extending from a surface of the front wall. 8. A method, comprising: forming annular metal local layers on a face of a support substrate, the annular metal local layers surrounding locations for receiving and mounting an electronic component; with respect to each portion of the annular metal local layers positioned between adjacent locations, forming in said portion a plurality of notches to define a plurality of spaced-apart teeth; mounting a plurality of encapsulating covers to the support substrate, each encapsulating cover mounted above a corresponding one of the locations with an end edge of a peripheral wall of each encapsulating cover attached to the annular metal local layer; and then cutting, between and at a distance from adjacent ones of the encapsulating covers, along the annular metal local layers and through the support substrate and the teeth of said annular local metal layers to obtain a plurality of individual electronic devices. 9. The method of claim 8 , wherein forming the plurality of notches comprises forming each notch to be surrounded by metal of said portion of the annular metal local layers. 10. The method of claim 8 , wherein mounting the plurality of encapsulating covers comprises aligning the end edge of the peripheral wall of each encapsulation cover with the notches. 11. The method of claim 8 , wherein each encapsulating cover includes a front wall and said peripheral wall extending from a surface of the front wall.

Assignees

Inventors

Classifications

  • Packaging processes not covered by the other groups of this subclass · CPC title

  • by a substrate and the encapsulations · CPC title

  • Shapes or dispositions of interconnections · CPC title

  • H10W76/60Primary

    Seals · CPC title

  • Electricity · mapped topic

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Frequently asked questions

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What does patent US10892201B2 cover?
A support substrate has a face above which at least one electronic component is fixed. A peripheral area of the face includes an annular local metal layer. An encapsulating cover for the electronic component includes a peripheral wall having an end edge that is mounted above the peripheral area. The annular metal local layer includes, at the periphery thereof, a series of spaced-apart teeth wit…
Who is the assignee on this patent?
Stmicroelectroncis Grenoble 2 Sas, Stmicroelectronics Malta Ltd, St Microelectronics Grenoble 2
What technology area does this patent fall under?
Primary CPC classification H10W76/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 12 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).