Power semiconductor module

Patent metadata

Field	Value
Publication number	US-10888941-B2
Application number	US-201816168857-A
Country	US
Kind code	B2
Filing date	Oct 24, 2018
Priority date	Oct 27, 2017
Publication date	Jan 12, 2021
Grant date	Jan 12, 2021

Abstract

When a distance between an end portion of a brazing material and a downward extended line of a side surface of an insulating substrate is taken as “a”, and a distance between an end portion of a solder resist on the side of a solder and the downward extended line of the side surface of the insulating substrate is taken as “b”, the positional relationship a<b is satisfied. The position of the end portion of the solder is regulated by the solder resist, and the position of the end portion of the brazing material on the side of the side surface of the insulating substrate is closer to the side of the side surface of the insulating substrate than to the position of the end portion of the solder on the side of the side surface of the insulating substrate.

First claim

What is claimed is:

1. A power semiconductor module comprising:
an insulating substrate;
a front surface electrode and a back surface electrode respectively fixed to a front surface and a back surface of the insulating substrate with a front surface brazing material interposed between the front surface electrode and the insulating substrate and a back surface brazing material interposed between the back surface electrode and the insulating substrate;
a power semiconductor chip connected to the front surface electrode with a front surface solder interposed between the power semiconductor chip and the front surface electrode;
a back surface solder formed on a side of the back surface electrode opposite to a side facing the back surface of the insulating substrate;
a metal base on which the back surface solder is disposed to fix the back surface electrode with the back surface solder interposed between the metal base and the back surface electrode;
a solder flow resistance portion formed on a surface of the metal base on which the back surface solder is disposed;
an insulating case housing the insulating substrate, the front surface electrode, the back surface electrode, the power semiconductor chip, and the metal base; and
an insulating resin filled in the insulating case,
wherein, the front surface solder, the front surface electrode, the front surface brazing material, the insulating substrate, the back surface brazing material, the back surface electrode, and the back surface solder are stacked in a vertical direction,
wherein a difference between a position in a lateral direction of an end portion of the back surface brazing material and a position in a lateral direction of an end portion of the insulating substrate is smaller than a difference between a position in the lateral direction of an end portion of the back surface solder and the position in the lateral direction of the end portion of the insulating substrate, and
wherein the difference between the position in the lateral direction of the end portion of the back surface solder and the position in the lateral direction of the end portion of the insulating substrate is smaller than a difference between a position in the lateral direction of an end portion of the back surface electrode and the position in the lateral direction of the end portion of the insulating substrate.

2. The power semiconductor module according to claim 1 , wherein
a difference between a position in a lateral direction of an end portion of the front surface brazing material and the position in the lateral direction of the end portion of the insulating substrate is smaller than the difference between the position in the lateral direction of the end portion of the back surface brazing material and the position in the lateral direction of the end portion of the insulating substrate.

3. The power semiconductor module according to claim 1 , wherein the position in the lateral direction of the end portion of the insulating substrate is located between both end portions of the solder flow resistance portion in the lateral direction.

4. The power semiconductor module according to claim 1 , wherein the solder flow resistance portion is a solder resist.

5. The power semiconductor module according to claim 4 , wherein
a difference between a position in a lateral direction of an end portion of the front surface brazing material and the position in the lateral direction of the end portion of the insulating substrate is smaller than the difference between the position in the lateral direction of the end portion of the back surface brazing material and the position in the lateral direction of the end portion of the insulating substrate.

6. The power semiconductor module according to claim 1 , wherein the solder flow resistance portion is a metal oxide film.

7. The power semiconductor module according to claim 6 , wherein
a difference between a position in a lateral direction of an end portion of the front surface brazing material and the position in the lateral direction of the end portion of the insulating substrate is smaller than the difference between the position in the lateral direction of the end portion of the back surface brazing material and the position in the lateral direction of the end portion of the insulating substrate.

8. The power semiconductor module according to claim 1 , wherein
the solder flow resistance portion is a non-plated portion.

9. The power semiconductor module according to claim 8 , wherein
a difference between a position in a lateral direction of an end portion of the front surface brazing material and the position in the lateral direction of the end portion of the insulating substrate is smaller than the difference between the position in the lateral direction of the end portion of the back surface brazing material and the position in the lateral direction of the end portion of the insulating substrate.

10. The power semiconductor module according to claim 1 , wherein
the solder flow resistance portion is a metal base recessed portion.

11. The power semiconductor module according to claim 10 , wherein the position in the lateral direction of the end portion of the insulating substrate is located between both end portions of the solder flow resistance portion in the lateral direction.

12. The power semiconductor module according to claim 10 , wherein
a difference between a position in a lateral direction of an end portion of the front surface brazing material and the position in the lateral direction of the end portion of the insulating substrate is smaller than the difference between the position in the lateral direction of the end portion of the back surface brazing material and the position in the lateral direction of the end portion of the insulating substrate.

13. The power semiconductor module according to claim 12 , wherein the position in the lateral direction of the end portion of the insulating substrate is located between both end portions of the solder flow resistance portion in the lateral direction.

Assignees

• Hitachi Power Semiconductor Device Ltd

Inventors

• Kawamura Daichi
• Masuda Toru
• Kusukawa Junpei
• Sakurai Naoki

Classifications

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/5434

  the connected ends being on auxiliary connecting means on bond pads, e.g. on other bond wires · CPC title

• H10W72/352

  comprising metals or metalloids, e.g. solders · CPC title