Time-based, current-controlled paired oscillator analog-to-digital converter with selectable resolution

US10879922B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10879922-B2
Application numberUS-201916534199-A
CountryUS
Kind codeB2
Filing dateAug 7, 2019
Priority dateAug 16, 2018
Publication dateDec 29, 2020
Grant dateDec 29, 2020

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

An analog to digital converter (ADC) includes voltage inputs, a transconductor configured to convert the voltage inputs into currents, current-controlled oscillators, a counter, and digital logic. The current-controlled oscillators propagate respect currents from the transconductor. The counter is configured to count repeated traversal of one or more oscillators. The digital logic is configured to, based upon results from the counter, provide a code configured to indicate a value of associated voltage input.

First claim

Opening claim text (preview).

The invention claimed is: 1. An analog to digital converter (ADC), comprising: a first voltage input; a second voltage input; a transconductor configured to: convert the first voltage input into a first current; and convert the second voltage input into a second current; a first current-controlled oscillator configured to receive the first current and propagate the first current through the first current-controlled oscillator; a second current-controlled oscillator configured to receive the second current and propagate the second current through the second current-controlled oscillator; a first counter configured to count repeated traversal of the first oscillator by the first current; and digital logic configured to, based upon results from the first counter, provide a code configured to indicate a value of the first voltage input; wherein: the ADC further comprises a second counter configured to count repeated traversal of the second current-controlled oscillator by the second current; and the digital logic is further configured to read the first counter upon the second counter reaching a predefined value. 2. The ADC of claim 1 , wherein the code configured to indicate the value of the first voltage input is expressed as whether the first voltage input is greater than the second voltage input. 3. The ADC of claim 1 , wherein the code configured to indicate the value of the first voltage input is expressed as an analog to digital conversion of the differential voltage between the first voltage input and the second voltage input. 4. The ADC of claim 1 , wherein the first current-controlled oscillator includes a series of logic including an odd plurality of inverting logic. 5. The ADC of claim 1 , wherein the digital logic is further configured to select the first current-controlled oscillator from a first group of current-controlled oscillators and to select the second current-controlled oscillator from a second group of current-controlled oscillators. 6. The ADC of claim 5 , wherein the digital logic is further configured to select the first current-controlled oscillator and the second current-controlled oscillator based on a comparison of the first current-controlled oscillator and the second current-controlled oscillator. 7. The ADC of claim 1 , wherein the digital logic is further configured to adjust accuracy of the ADC by adjusting the predefined value. 8. The ADC of claim 1 , wherein the digital logic is further configured to, based upon results from the first counter and the second counter, provide the code, the code further configured to indicate a differential voltage between the first voltage input and the second voltage input. 9. A method, comprising: converting a first voltage input into a first current; and converting a second voltage input into a second current; with a first current-controlled oscillator, receiving the first current and propagating the first current through the first current-controlled oscillator; with a second current-controlled oscillator configured to receive the second current and propagate the second current through the second current-controlled oscillator; counting repeated traversal of the first oscillator by the first current; and based upon results from counting repeated traversal of the first oscillator by the first current, providing a code configured to indicate a value of the first voltage input; wherein the method further comprises: counting repeated traversal of the second current-controlled oscillator by the second current; and stopping the counting upon reaching a predefined value, and adjusting accuracy of the ADC by adjusting the predefined value. 10. The method of claim 9 , further comprising indicating with the code whether the first voltage input is greater than the second voltage input. 11. The method of claim 9 , further comprising indicating with the code an analog to digital conversion of the differential voltage between the first voltage input and the second voltage input. 12. The method of claim 9 , further comprising inverting signals within the first oscillator using an odd plurality of inverting logic. 13. The method of claim 9 , further comprising, based upon a count of the traversal of the first oscillator and a count of the traversal of the second oscillator, indicating, with the code, a differential voltage between the first voltage input and the second voltage input. 14. The method of claim 13 , further comprising selecting the first current-controlled oscillator from a first group of current-controlled oscillators and selecting the second current-controlled oscillator from a second group of current-controlled oscillators. 15. The method of claim 14 , further comprising selecting the first current-controlled oscillator and the second current-controlled oscillator based on a comparison of the first current-controlled oscillator and the second current-controlled oscillator. 16. A system, comprising: a first voltage source; a second voltage source; and an analog to digital converter (ADC), comprising: a first voltage input; a second voltage input; a transconductor configured to: convert the first voltage input into a first current; and convert the second voltage input into a second current; a first current-controlled oscillator configured to receive the first current and propagate the first current through the first current-controlled oscillator; a second current-controlled oscillator configured to receive the second current and propagate the second current through the second current-controlled oscillator; a first counter configured to count repeated traversal of the first oscillator by the first current; and digital logic configured to, based upon results from the first counter, provide a code configured to indicate a value of the first voltage input; wherein: the ADC further comprises a second counter configured to count repeated traversal of the second current-controlled oscillator by the second current; and the digital logic is further configured to read the first counter upon the second counter reaching a predefined value.

Assignees

Inventors

Classifications

  • H03M1/60Primary

    with intermediate conversion to frequency of pulses · CPC title

  • Details of sampling arrangements or methods · CPC title

  • H03M1/50Primary

    with intermediate conversion to time interval (H03M1/64 takes precedence) · CPC title

  • the steps being performed sequentially in series-connected stages (H03M1/161 takes precedence) · CPC title

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What does patent US10879922B2 cover?
An analog to digital converter (ADC) includes voltage inputs, a transconductor configured to convert the voltage inputs into currents, current-controlled oscillators, a counter, and digital logic. The current-controlled oscillators propagate respect currents from the transconductor. The counter is configured to count repeated traversal of one or more oscillators. The digital logic is configured…
Who is the assignee on this patent?
Microchip Tech Inc
What technology area does this patent fall under?
Primary CPC classification H03M1/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 29 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).