Assembly of semiconductor devices using multiple LED placement cycles

US10878733B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10878733-B2
Application numberUS-201615753959-A
CountryUS
Kind codeB2
Filing dateSep 2, 2016
Priority dateSep 2, 2015
Publication dateDec 29, 2020
Grant dateDec 29, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for manufacturing a display element comprising a plurality of pixels, each comprising a plurality of sub-pixels. The method comprises undertaking, using a pick up tool, a first placement cycle (1908) comprising picking up a plurality of first, untested LED dies and placing them on a display substrate at locations corresponding to the plurality of pixels, testing (1912) the first LED emitters on the display substrate to determine one or more locations of non-functional first LED emitters, selecting one or more second tested LED dies based on a result of the test, configuring the selected one or more second LED dies to enable their pick up and placement on the display substrate and undertaking, using the PUT, a second placement cycle (2008) comprising picking up the selected one or more second LED dies and placing them on the display substrate at the determined locations of the non-functional first LED emitters.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for manufacturing a display comprising a plurality of pixels, each pixel comprising a plurality of sub-pixels, each sub-pixel being configured to provide light of a given wavelength, the method comprising: undertaking, using a pick up tool (PUT), a first placement cycle comprising picking up a plurality of first LED dies, each first LED die comprising at least one first LED emitter configured to provide one of the plurality of sub-pixels of the display, and placing the plurality of first LED dies on a display substrate at locations corresponding to the plurality of pixels of the display, the plurality of first LED dies being untested when picked up and placed by the PUT; testing the first LED emitters of the plurality of first LED dies on the display substrate to determine one or more locations of non-functional first LED emitters; from a plurality of second LED dies each comprising at least one second LED emitter configured to provide one of the plurality of sub-pixels of the display, selecting one or more second LED dies based on a result of the test, the plurality of second LED dies being determined as operable based on a previous test of the plurality of second LED dies; configuring the selected one or more second LED dies to enable their pick up and placement on the display substrate; and undertaking, using the PUT, a second placement cycle comprising picking up the selected one or more second LED dies and placing the selected one or more second LED dies on the display substrate at the determined locations of the non-functional first LED emitters. 2. The method according to claim 1 , wherein configuring the selected one or more second LED dies comprises depositing a deformable material on the selected one or more second LED dies. 3. The method according to claim 2 , wherein the deformable material is configured to cause adhesion between the selected one or more second LED dies and the PUT during the second placement cycle. 4. The method according to claim 2 , wherein the step of depositing the deformable material on the selected one or more second LED dies comprises applying the deformable material to a mold or carrier element and engaging the mold or carrier element with a surface of the selected one or more of second LED dies so that the deformable material is in contact with the surface of the selected one or more second LED dies. 5. The method according to claim 4 , wherein depositing the deformable material on the selected one or more second LED dies comprises modifying a level of adhesion between the deformable material and the selected one or more second LED dies so that the deformable material adheres to the selected one or more second LED dies. 6. The method according to claim 5 , wherein modifying the level of adhesion between the deformable material and the selected one or more second LED dies comprises irradiating with light one or more portions of the mold or carrier element corresponding to locations of the selected one or more second LED dies. 7. The method according to claim 2 , further comprising, prior to depositing the deformable material on the selected one or more second LED dies, placing the selected one or more second LED dies on a handle layer. 8. The method according to claim 7 , wherein the selected one or more second LED dies are adhered to the handle layer, and the second placement cycle comprises modifying a level of adhesion between the selected one or more second LED dies and the handle layer, such that the level of adhesion is less than a force applied by the PUT. 9. The method according to claim 1 , further comprising depositing a deformable material on the plurality of first LED dies, prior to undertaking the first placement cycle. 10. The method according to claim 9 , wherein the deformable material is configured to cause adhesion between the plurality of first LED dies and the PUT during the first placement cycle. 11. The method according to claim 1 , further comprising undertaking a further test of the first LED emitters and/or the second LED emitters after the second placement cycle to determine locations of one or more non-functional first and/or second LED emitters. 12. The method according to claim 11 , further comprising selecting one or more third, tested LED dies after undertaking the further test, based on a result of the further test. 13. The method according to claim 11 , wherein the test and/or the further test comprises applying a reverse bias to the first and/or the second LED emitters and/or applying a forward bias to the first and/or second LED emitters and using one or more filter(s) to analyze the emission from the first and/or second LED emitters. 14. The method according to claim 11 , further comprising undertaking one or more calibration cycles of an assembled display based on the results of the test and/or the further test, wherein the one or more calibration cycles comprise disconnecting one or more non-functional first and/or second LED emitters from a drive circuitry on the display substrate. 15. The method according to claim 1 , further comprising depositing an underfill or non-conductive film on the substrate of the display, prior to the first placement cycle. 16. The method according to claim 15 , further comprising modifying a viscosity of the underfill or non-conductive film to enable pre-bonding or bonding of the plurality of first LED dies to the display substrate. 17. The method according to claim 1 , wherein the plurality of first LED dies and/or the selected one or more second LED dies comprise a bonding element arranged to permit interconnection of the plurality of first LED dies and/or the selected one or more second LED dies to the display substrate. 18. The method according to claim 17 , wherein the bonding element is configured to form a temporary contact with an electrical contact of the display substrate, thereby allowing testing of the plurality of first LED dies and/or the selected one or more second LED dies. 19. The method according to claim 1 , wherein the method comprises bonding the plurality of first LED dies and/or the selected one or more second LED dies to the display substrate using a bonding head, wherein the bonding head comprises a drum configured to move across the display substrate of the display and apply a force to the plurality of first LED dies and/or the selected one or more second LED dies positioned on the display substrate. 20. The method according to claim 1 , wherein the PUT is a non-selective PUT.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • of bump connectors · CPC title

  • using temporary auxiliary members, e.g. sacrificial coatings · CPC title

  • H10W90/00Primary

    Package configurations · CPC title

  • on active surfaces of flip-chip devices, e.g. underfills · CPC title

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What does patent US10878733B2 cover?
A method for manufacturing a display element comprising a plurality of pixels, each comprising a plurality of sub-pixels. The method comprises undertaking, using a pick up tool, a first placement cycle (1908) comprising picking up a plurality of first, untested LED dies and placing them on a display substrate at locations corresponding to the plurality of pixels, testing (1912) the first LED em…
Who is the assignee on this patent?
Facebook Tech Llc
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 29 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).