Dual-input voltage memory digital pre-distortion circuit and related envelope tracking apparatus

Patent metadata

Field	Value
Publication number	US-10873301-B2
Application number	US-201916377689-A
Country	US
Kind code	B2
Filing date	Apr 8, 2019
Priority date	Apr 8, 2019
Publication date	Dec 22, 2020
Grant date	Dec 22, 2020

Abstract

A dual-input voltage memory digital pre-distortion (mDPD) circuit and related ET apparatus are provided. In examples discussed herein, an ET apparatus includes an amplifier circuit(s) configured to amplify a radio frequency (RF) signal based on an ET voltage. A tracker circuit is configured to generate the ET voltage based on a number of target voltage amplitudes derived from a number of signal amplitudes of the RF signal. However, the tracker circuit can cause the ET voltage to deviate from the target voltage amplitudes due to various inherent impedance variations, particularly at a higher modulation bandwidth. In this regard, a dual-input voltage mDPD circuit is configured to digitally pre-distort the target voltage amplitudes based on the signal amplitudes such that the ET voltage can closely track the target voltage amplitudes. As such, it is possible to mitigate ET voltage deviation, thus helping to improve overall linearity performance of the ET apparatus.

First claim

What is claimed is:

1. A dual-input voltage memory digital pre-distortion (mDPD) circuit comprising:
a first port coupled to an input node of an envelope tracking (ET) engine circuit to receive a first digital signal having a plurality of signal amplitudes;
a second port coupled to an output node of the ET engine circuit to receive a second digital signal having a plurality of voltage amplitudes corresponding to the plurality of signal amplitudes; and
a control circuit configured to:
receive the first digital signal and the second digital signal from the first port and the second port, respectively; and
digitally pre-distort the plurality of voltage amplitudes based on the plurality of signal amplitudes to generate a digital target voltage signal having a plurality of target voltage amplitudes corresponding to the plurality of voltage amplitudes.

2. The dual-input voltage mDPD circuit of claim 1 wherein the control circuit is further configured to digitally pre-distort the plurality of voltage amplitudes based on the plurality of signal amplitudes to correct one or more misalignments between the plurality of voltage amplitudes and the plurality of signal amplitudes in the plurality of target voltage amplitudes.

3. The dual-input voltage mDPD circuit of claim 1 wherein the control circuit is further configured to execute a dual-input memory polynomial to digitally pre-distort the plurality of voltage amplitudes based on the plurality of signal amplitudes.

4. The dual-input voltage mDPD circuit of claim 3 wherein the dual-input memory polynomial is a non-coupled memory polynomial (NCMP) expressed as:

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Assignees

• Qorvo Us Inc

Inventors

• Chiron Jean-Frederic

Classifications

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F1/3258

  based on polynomial terms · CPC title

• H03F1/3247 Primary

  using feedback acting on predistortion circuits (H03F1/3264 takes precedence) · CPC title

• H03F2201/3233

  Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion · CPC title

• H03F3/24

  of transmitter output stages · CPC title