Error correction device, operating method of error correction device, and controller including error correction device

Patent metadata

Field	Value
Publication number	US-10868566-B2
Application number	US-201816100979-A
Country	US
Kind code	B2
Filing date	Aug 10, 2018
Priority date	Dec 14, 2017
Publication date	Dec 15, 2020
Grant date	Dec 15, 2020

Abstract

An error correction device includes a low density parity check (LDPC) decoder and an adaptive decoding controller. The LDPC decoder iteratively performs LDPC decoding on data by using a decoding parameter. The adaptive decoding controller calculates an error rate depending on a result of the LDPC decoding and adjusts the decoding parameter depending on the error rate.

First claim

What is claimed is:

1. An error correction device comprising:
a low density parity check (LDPC) decoder that includes a parity check matrix and iteratively performs LDPC decoding on data by using the parity check matrix and a decoding parameter; and
an adaptive decoding controller that calculates an error rate depending on a result of the LDPC decoding and adjusts the decoding parameter, except for the parity check matrix, depending on the error rate, wherein:
after first LDPC decoding is performed on the data, the adaptive decoding controller adjusts the decoding parameter from a first decoding parameter to a second decoding parameter depending on a result of the first LDPC decoding,
the LDPC decoder performs second LDPC decoding following the first LDPC decoding on the result of the first LDPC decoding by using the parity check matrix and the second decoding parameter,
the error correction device further comprises a memory that stores decoding parameters, and
the adaptive decoding controller controls the memory such that one of the decoding parameters is transferred to the LDPC decoder as the decoding parameter.

2. The error correction device of claim 1 , wherein the adaptive decoding controller calculates the error rate, based on values of variable nodes of the result of the LDPC decoding.

3. The error correction device of claim 2 , wherein the error rate includes a ratio between a number of incorrect values of the variable nodes and a number of check nodes.

4. The error correction device of claim 1 , wherein the adaptive decoding controller adjusts a value to be mapped to each of messages that are transferred from check nodes to variable nodes depending on the error rate.

5. The error correction device of claim 1 , wherein the adaptive decoding controller adjusts a value to be mapped to a corresponding bit or corresponding bits of the data at each of variable nodes depending on the error rate.

6. The error correction device of claim 1 , wherein the adaptive decoding controller determines a value represented by bits depending on a log likelihood ratio (LLR) value at each variable node and adjusts boundaries of the LLR value, at which the value of the bits is determined, depending on the error rate.

7. The error correction device of claim 1 , wherein prior to a first iteration of the LDPC decoding, the LDPC decoder assigns initial LLR values to the data depending on the decoding parameter.

8. The error correction device of claim 7 , wherein prior to a first iteration of the LDPC decoding, the adaptive decoding controller calculates an initial error rate of the data and adjusts the initial LLR values depending on the error rate.

9. The error correction device of claim 1 , wherein the adaptive decoding controller maintains the decoding parameter for a predetermined number of iterations of the LDPC decoding.

10. The error correction device of claim 9 , wherein:
the decoding parameter further includes the predetermined number of iterations, and
the adaptive decoding controller adjusts the predetermined number of iterations depending on the error rate.

11. The error correction device of claim 9 , wherein the adaptive decoding controller skips calculation of the error rate while the decoding parameter is maintained.

12. An operating method of an error correction device, the method comprising:
receiving data;
performing first low density parity check (LDPC) decoding on the data, based on a parity check matrix and a first decoding parameter;
calculating an error rate depending on a result of the first LDPC decoding;
adjusting the first decoding parameter, except for the parity check matrix, to a second decoding parameter depending on the error rate; and
performing second LDPC decoding on a result of the first LDPC decoding, based on the parity check matrix and the second decoding parameter, wherein:
the error correction device comprises a memory that stores decoding parameters, and
the adjusting of the first decoding parameter includes controlling the memory such that one of the decoding parameters is selected as the second decoding parameter.

13. The method of claim 12 , wherein the calculating of the error rate includes calculating a ratio between a number of incorrect values of variable nodes included in a result of the first LDPC decoding and a number of check nodes.

14. The method of claim 12 , further comprising assigning initial log likelihood ratio (LLR) values to bits of the data.

15. The method of claim 14 , further comprising:
calculating an initial error rate of the data; and
adjusting the initial LLR values depending on the initial error rate.

16. The method of claim 12 , wherein the second LDPC decoding is iterated a predetermined number of iterations while maintaining the second decoding parameter.

17. The method of claim 16 , wherein the adjusting of the first decoding parameter to the second decoding parameter depending on the error rate includes adjusting a value of the predetermined number of iterations.

18. A controller comprising:
a memory interface that receives data from a memory; and
an error correction device that corrects an error of the data received through the memory interface, wherein:
the error correction device includes:
a low density parity check (LDPC) decoder that includes a parity check matrix and iteratively performs LDPC decoding on the data by using a decoding parameter; and
an adaptive decoding controller that calculates an error rate depending on a result of the LDPC decoding and adjusts the decoding parameter, except for the parity check matrix, depending on the error rate, wherein:

after first LDPC decoding is performed on the data, the adaptive decoding controller adjusts the decoding parameter from a first decoding parameter to a second decoding parameter depending on a result of the first LDPC decoding,
the LDPC decoder performs second LDPC decoding following the first LDPC decoding on the result of the first LDPC decoding by using the parity check matrix and the second decoding parameter,
the error correction device further comprises a memory that stores decoding parameters, and
the adaptive decoding controller controls the memory such that one of the decoding parameters is transferred to the LDPC decoder as the decoding parameter.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Yang Kyeongcheol
• Cho Sunghye
• Hwang Youngjun
• Kong Junjin
• Son Hong Rak
• Shin Dong-Min
• Lee Kijun

Classifications

• G06F11/1008 Primary

  in individual solid state devices (G06F11/1004 takes precedence) · CPC title

• H03M13/6577

  Representation or format of variables, register sizes or word-lengths and quantization · CPC title

• H03M13/3715

  Adaptation to the number of estimated errors or to the channel state · CPC title

• H03M13/1117

  using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule · CPC title

• H03M13/3746

  with iterative decoding · CPC title