Semiconductor Device and a Method for Forming a Semiconductor Device
US-2016240615-A1 · Aug 18, 2016 · US
US10868159B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10868159-B2 |
| Application number | US-201916413815-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 16, 2019 |
| Priority date | May 17, 2018 |
| Publication date | Dec 15, 2020 |
| Grant date | Dec 15, 2020 |
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A power semiconductor device includes a semiconductor body having a front side coupled to a first load terminal structure and a backside coupled to a second load terminal structure. A front side structure arranged at the front side is at least partially included in the semiconductor body and defines a front side active region configured to conduct a load current between the load terminal structures. The front side structure includes first and second lateral edge portions and a first corner portion that forms a transition between the lateral edge portions. A drift region included in the semiconductor body is configured to carry the load current. A backside emitter region arranged in the semiconductor body in contact with the second load terminal has a net dopant concentration higher than a net dopant concentration of the drift region.
Opening claim text (preview).
The invention claimed is: 1. A power semiconductor device, comprising: a semiconductor body having a front side coupled to a first load terminal structure and a backside coupled to a second load terminal structure; a front side structure being arranged at the front side and at least partially included in the semiconductor body, the front side structure defining a front side active region configured to conduct a load current between the first load terminal structure and the second load terminal structure in a conducting state of the power semiconductor device, the front side structure comprising a first lateral edge portion, a second lateral edge portion, and a first corner portion forming a transition between the first lateral edge portion and the second lateral edge portion; a drift region of a first conductivity type included in the semiconductor body and configured to carry the load current; and a backside emitter region arranged in the semiconductor body in contact with the second load terminal, the backside emitter region having a net dopant concentration that is higher than a net dopant concentration of the drift region, wherein, in a vertical projection, the backside emitter region laterally terminates at a first distance from the first lateral edge portion and/or the second lateral edge portion and at a second distance from the first corner portion, the second distance being larger than the first distance. 2. The power semiconductor device of claim 1 , wherein the first distance and the second distance are both positive, and wherein the second distance is at least 1.5 times the first distance. 3. The power semiconductor device of claim 1 , wherein a difference in distance between the second distance and the first distance is at least a diffusion length of free charge carriers. 4. The power semiconductor device of claim 1 , wherein a difference in distance between the second distance and the first distance is at least half a vertical extension of the drift region. 5. The power semiconductor device of claim 1 , wherein the first distance is at least 0.5 times a diffusion length of free charge carriers. 6. The power semiconductor device of claim 1 , wherein the first lateral edge portion and the second lateral edge portion are straight edge portions. 7. The power semiconductor device of claim 1 , wherein the first lateral edge portion and the second lateral edge portion are in parallel to corresponding lateral chip edges of the semiconductor body. 8. The power semiconductor device of claim 1 , wherein the first corner portion is a rounded corner. 9. The power semiconductor device of claim 1 , wherein the power semiconductor device is or comprises a diode. 10. The power semiconductor device of claim 9 , wherein the front side structure is an anode region of a second conductivity type complementary to the first conductivity type, the anode region being included in the semiconductor body. 11. The power semiconductor device of claim 9 , wherein the backside emitter region is a cathode region of the first conductivity type. 12. The power semiconductor device of claim 1 , wherein the power semiconductor device is or comprises an IGBT. 13. The power semiconductor device of claim 12 , wherein the front side structure is a cell field comprising a plurality of IGBT cells. 14. The power semiconductor device of claim 13 , wherein the cell field comprises a plurality of trenches, which are in each case separated from a respective neighboring trench of the cell field by a semiconductor mesa region, and wherein a lateral extension of the semiconductor mesa regions in a vicinity of an outer edge of the cell field is larger than a lateral extension of semiconductor mesa regions in a central portion of the cell field. 15. The power semiconductor device of claim 13 , wherein the cell field comprises a plurality of trenches, which are in each case separated from a respective neighboring trench of the cell field by a semiconductor mesa region, and wherein a lateral extension of the semiconductor mesa regions in a vicinity of the first corner portion is larger than a lateral extension of semiconductor mesa regions in a vicinity of the first and/or second lateral edge portion. 16. The power semiconductor device of claim 12 , wherein the backside emitter region is of a second conductivity type that is complementary to the first conductivity type. 17. The power semiconductor device of claim 16 , further comprising a second backside region of the second conductivity type, the second backside region being arranged in contact with the second load terminal and having a net dopant concentration of the second conductivity type that is lower than the net dopant concentration of the second conductivity type of the backside emitter region. 18. A power semiconductor device, comprising: a semiconductor body having a front side coupled to a first load terminal structure and a backside coupled to a second load terminal structure; a front side structure arranged at the front side and at least partially included in the semiconductor body, the front side structure comprising a cell field having a plurality of IGBT cells which define a front side active region that is configured to conduct a load current between the first load terminal structure and the second load terminal structure in a conducting state of the power semiconductor device, the front side structure having: a recess defining a pad region for providing a contact pad at the front side; a third lateral edge portion extending alongside the pad region; a fourth lateral edge portion extending alongside the pad region; and a second corner portion that forms a transition between the third lateral edge portion and the fourth lateral edge portion; a drift region of a first conductivity type included in the semiconductor body and configured to carry the load current; and a backside emitter region arranged in the semiconductor body in contact with the second load terminal, the backside emitter region having a net dopant concentration that is higher than a net dopant concentration of the drift region, wherein, in a vertical projection, an overlap of the pad region and the backside emitter region laterally terminates at a third distance from the third lateral edge portion and/or the fourth lateral edge portion and at a fourth distance from the second corner portion, the fourth distance being larger than the third distance. 19. The power semiconductor device of claim 18 , wherein the third lateral edge portion and the fourth lateral edge portion are in parallel to corresponding lateral edges of a gate pad arranged inside the pad region at the front side of the semiconductor body.
Cathode regions of diodes · CPC title
Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127) · CPC title
Emitter regions of BJTs · CPC title
having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs · CPC title
characterised by their top-view geometrical layouts · CPC title
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