Power network having power switch units composing rhombus area

Patent metadata

Field	Value
Publication number	US-10867918-B2
Application number	US-201816162449-A
Country	US
Kind code	B2
Filing date	Oct 17, 2018
Priority date	Sep 7, 2018
Publication date	Dec 15, 2020
Grant date	Dec 15, 2020

Abstract

A power network includes a plurality of power switch units disposed in a first semiconductor layer, arranged in a plurality of columns along a first direction and a plurality of rows along a second direction. The power switch units in even rows are aligned with a center point of a horizontal space between adjacent two of the power switch units in the same row of the odd rows of the power switch units in the first direction. The power switch units in even columns are aligned with a center point of a vertical space between adjacent two of the power switch units in the same column of the odd columns of the power switch units in the second direction. The power network further includes a plurality of second connecting lines disposed in a fourth semiconductor layer and extending in the second direction.

First claim

What is claimed is:

1. A power network, comprising:
a plurality of power switch units, arranged in a plurality of columns along a first direction and a plurality of rows along a second direction;
wherein the plurality of power switch units in even rows are aligned with a center point of a horizontal space between adjacent two of the plurality of power switch units in the same row of the odd rows of the plurality of power switch units in the first direction;
wherein the plurality of power switch units in even columns are aligned with a center point of a vertical space between adjacent two of the plurality of power switch units in the same column of the odd columns of the plurality of power switch units in the second direction;
a plurality of second connecting lines, extending in the second direction, wherein the plurality of second connecting lines are separated by a width of one of the plurality of power switch units;
wherein an upper edge and a lower edge of one of the plurality of power switch units are connected to adjacent two of the plurality of second connecting lines, respectively; and
wherein the vertical space between the adjacent two of the plurality of power switch units in the same column is equal to integer multiples of an interval of the plurality of second connecting lines.

2. The power network as claimed in claim 1 , further comprising:
a plurality of first power lines, extending in the first direction, one of the plurality of first power lines crossing over one column of the plurality of power switch units; and
a plurality of second power lines, extending in the first direction, the plurality of second power lines being respectively separated from and parallel to the plurality of first power lines.

3. The power network as claimed in claim 2 , further comprising:
a plurality of first connecting lines, extending in the first direction, wherein adjacent two of the plurality of first connecting lines cross over one column of the plurality of power switch units and are respectively positioned on two sides of one of the plurality of first power lines, wherein the plurality of first connecting lines are parallel to the plurality of first power lines.

4. The power network as claimed in claim 3 , further comprising:
a plurality of third connecting lines, respectively connecting the plurality of power switch units to the plurality of first power lines, the plurality of second power lines, and the plurality of first connecting lines.

5. The power network as claimed in claim 3 , wherein four of the plurality of power switch units compose a rhombus, wherein area of the rhombus is obtained based on a utilization rate of the plurality of power switch units;
a horizontal axis space of the rhombus is calculated according to a sheet resistance of the plurality of first connecting lines, a sheet resistance of the plurality of second connecting lines, and the area of the rhombus; and
the plurality of power switch units are disposed in the power network according to the area of the rhombus and the horizontal axis space of the rhombus.

6. The power network as claimed in claim 5 , wherein the horizontal axis space of the rhombus is obtained using a formula, wherein the formula is:
d =( Ab/a ) 1/2 ,
wherein “A” is half of the area of the rhombus, “a” is the sheet resistance of the plurality of second connecting lines, “b” is the sheet resistance of the plurality of first connecting lines, and “d” is half of the horizontal axis space of the rhombus.

7. The power network as claimed in claim 3 , further comprising:
a first semiconductor layer comprising the plurality of power switch units;
a second semiconductor layer comprising the plurality of first power lines and the plurality of second power lines;
a third semiconductor layer comprising the plurality of first connecting lines; and
a fourth semiconductor layer comprising the plurality of second connecting lines.

8. The power network as claimed in claim 7 , the first semiconductor layer overlaps the fourth semiconductor layer.

9. The power network as claimed in claim 7 , wherein the first semiconductor layer is the fourth semiconductor layer.

10. The power network as claimed in claim 1 , further comprising:
a plurality of standard cells, wherein one of the plurality of standard cells connects to one of the plurality of second connecting lines.

Assignees

• Shanghai Zhaoxin Semiconductor Co Ltd

Inventors

• Lin Jerming
• Sun Lei
• Li Bing

Classifications

• H10W72/00

  Interconnections or connectors in packages · CPC title

• H10W20/427 Primary

  Power or ground buses · CPC title

• H02M1/088

  for the simultaneous control of series or parallel connected semiconductor devices · CPC title

• G06F30/394

  Routing (G06F30/396 takes precedence) · CPC title

• G06F30/392 Primary

  Floor-planning or layout, e.g. partitioning or placement · CPC title