Active matrix substrate and display device

Patent metadata

Field	Value
Publication number	US-10866475-B2
Application number	US-201816493337-A
Country	US
Kind code	B2
Filing date	Mar 15, 2018
Priority date	Mar 17, 2017
Publication date	Dec 15, 2020
Grant date	Dec 15, 2020

Abstract

An active matrix substrate according to an aspect of the disclosure includes a pixel portion including a plurality of gate lines and a plurality of source lines, and a plurality of pixel electrodes, and a split switch circuit configured to split a signal from a source driver to supply to the plurality of source lines, wherein the pixel portion includes a first TFT including a first oxide semiconductor layer, the split switch circuit includes a second TFT including a second oxide semiconductor layer and a third oxide semiconductor layer, and the third oxide semiconductor layer covers at least a portion of an upper face and a portion of an edge face of the second oxide semiconductor layer.

First claim

The invention claimed is:

1. An active matrix substrate comprising:
a pixel portion including a plurality of gate lines and a plurality of source lines intersecting each other, and a plurality of pixel electrodes provided in a matrix corresponding to the intersections between the plurality of gate lines and the plurality of source lines; and
a split switch circuit configured to split a signal from a source driver to supply to the plurality of source lines, wherein
the pixel portion includes a first thin film transistor including a first oxide semiconductor layer,
the split switch circuit includes a second thin film transistor including a second oxide semiconductor layer and a third oxide semiconductor layer,
the third oxide semiconductor layer covers at least a portion of an upper face and a portion of an edge face of the second oxide semiconductor layer, and
a threshold voltage of the second thin film transistor is less than a threshold voltage of the first thin film transistor.

2. An active matrix substrate comprising:
a pixel portion including a plurality of gate lines and a plurality of source lines intersecting each other, and a plurality of pixel electrodes provided in a matrix corresponding to the intersections between the plurality of gate lines and the plurality of source lines; and
a split switch circuit configured to split a signal from a source driver to supply to the plurality of source lines, wherein
the pixel portion includes a first thin film transistor including a first oxide semiconductor layer,
the split switch circuit includes a second thin film transistor including a second oxide semiconductor layer and a third oxide semiconductor layer,
the third oxide semiconductor layer covers at least a portion of an upper face and a portion of an edge face of the second oxide semiconductor layer, and
a threshold voltage of the second thin film transistor is a negative value.

3. The active matrix substrate according to claim 2 ,
wherein a threshold voltage of the first thin film transistor is a positive value.

4. A display device comprising the active matrix substrate according to claim 1 .

5. A display device comprising the active matrix substrate according to claim 2 .

Assignees

• Sharp Kk

Inventors

• Saitoh Yuhichi

Classifications

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D30/6734

  having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs · CPC title

• H10D62/80

  characterised by the materials · CPC title

• H10D62/402

  Amorphous materials · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title