Sealing cell and method for encapsulating a microelectronic component with such a sealing cell
US-2018309097-A1 · Oct 25, 2018 · US
Process for encapsulation of a microelectronic device by easily manipulated thin or ultrathin substrates
US10865104B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10865104-B2 |
| Application number | US-201916258832-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 28, 2019 |
| Priority date | Jan 30, 2018 |
| Publication date | Dec 15, 2020 |
| Grant date | Dec 15, 2020 |
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Abstract
Official abstract text for this publication.
Process for encapsulation of a microelectronic device comprising the following steps in sequence: supply a support substrate comprising a first principal face on which a microelectronic device is placed, a second principal face, and a lateral face, deposit a bonding layer on the first principal face of the substrate, position an encapsulation cover comprising a first principal face, a second principal face, and a lateral face, on the bonding layer, deposit a lateral protection layer on: the lateral face and the periphery of the second principal face of the support substrate, the lateral face and the periphery of the second principal face of the encapsulation cover, the lateral protection layer delimiting a protected zone, thinning of the second principal face of the support substrate and/or the second principal face of the encapsulation cover outside the protected zone.
First claim
Opening claim text (preview).
The invention claimed is: 1. A process for encapsulation of a microelectronic device placed on a support substrate, with an encapsulation cover comprising the following successive steps: a) supplying the support substrate made of a first material, comprising a first principal face on which the microelectronic device is placed, a second principal face opposite the first principal face, and a lateral face, b) depositing a bonding layer made of a second material on the first principal face of the substrate, around the microelectronic device, c) positioning the encapsulation cover made of a third material, comprising a first principal face, a second principal face opposite the first principal face, and a lateral face on the bonding layer, so as to fix the encapsulation cover on the support substrate so as to encapsulate the microelectronic device, d) depositing a lateral protection layer made of a fourth material on the lateral face of the support substrate, on the lateral face of the encapsulation cover, on a periphery of the second principal face of the encapsulation cover, and around a periphery of the second principal face of the support substrate, the lateral protection layer delimiting a protected zone and, e) thinning of the second principal face of the support substrate and/or the second principal face of the encapsulation cover outside the protected zone, by chemical etching. 2. The process according to claim 1 , wherein the first material and the third material are chosen among glass and silicon. 3. The process according to claim 1 , wherein the first material and the third material are identical. 4. The process according to claim 1 , wherein the first material and the third material are different. 5. The process according to claim 1 , wherein, during step b), the bonding layer entirely covers the microelectronic device. 6. The process according to claim 1 , wherein, during step b), the bonding layer forms a sealing bead around the microelectronic device. 7. The process according to claim 1 , wherein the second material and the fourth material are polymer materials chosen from among epoxides, ethers, polysiloxanes, acrylics, copolymers thereof, and polyethylene teraphthalate. 8. The process according to claim 1 wherein, after step e), the thickness of the encapsulation cover and/or the thickness of the support substrate is less than or equal to 100 μm.
Assignees
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Classifications
by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation · CPC title
comprising oxides, nitrides or carbides, e.g. ceramics or glasses · CPC title
using batch processing · CPC title
Manufacture or treatment · CPC title
Inorganic material · CPC title
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Frequently asked questions
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- What does patent US10865104B2 cover?
- Process for encapsulation of a microelectronic device comprising the following steps in sequence: supply a support substrate comprising a first principal face on which a microelectronic device is placed, a second principal face, and a lateral face, deposit a bonding layer on the first principal face of the substrate, position an encapsulation cover comprising a first principal face, a second pr…
- Who is the assignee on this patent?
- Commissariat Energie Atomique
- What technology area does this patent fall under?
- Primary CPC classification G06F13/42. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Dec 15 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).