Technologies for identifying thread memory allocation

US10860377B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10860377-B2
Application numberUS-201715466072-A
CountryUS
Kind codeB2
Filing dateMar 22, 2017
Priority dateMar 22, 2017
Publication dateDec 8, 2020
Grant dateDec 8, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Systems, methods, and computer-readable media for identifying and managing memory allocation for one or more threads are described. A computer system may detect that a threshold memory utilization has been met, and may determine an aggregate memory allocation for a thread. The aggregate memory allocation may be a difference between a first memory allocation for the thread at a first time that the threshold memory utilization was met and a second memory allocation for the thread at a second time that the threshold memory utilization was met. The computer device may provide an indication that the thread has met or exceeded a threshold memory allocation when the aggregate memory allocation is greater than or equal to the threshold memory allocation. The computer device may disable the thread when the aggregate memory allocation is greater than or equal to the threshold memory allocation. Other embodiments may be described and/or claimed.

First claim

Opening claim text (preview).

The invention claimed is: 1. A computer program stored on a non-transitory computer- readable media and to be implemented by computing system, the computer program comprising a set of instructions, that when executed by one or more processors of the computing system, is operable to cause the computing system to: detect initiation of a current garbage collection (GC) cycle based on a threshold memory utilization being met; collect, for each thread of a set of currently running threads in response to detection of the initiation of the current GC cycle, current thread information (CTI) and previous thread information (PTI), the CTI for a respective thread of the set of currently running threads indicating a current memory allocation for the respective thread during the current GC cycle, the PTI for the respective thread of the set of currently running threads indicating a previous thread memory allocation for the respective thread during a previous GC cycle, and both the CTI and the PTI indicating an application to which the respective thread belongs; determine an aggregate thread memory allocation for each thread, the aggregate memory allocation for each thread being a difference between the current memory allocation and the previous thread memory allocation; and provide an indication indicating at least one feature of at least one application including one or more threads of the set of currently running threads potentially triggered the current GC cycle based on whether the aggregate thread memory allocation met or exceeded a threshold memory allocation. 2. The computer program of claim 1 , when executed by the one or more processors is further operable to cause the computing system to: disable the one or more threads when the aggregate thread memory allocation is greater than or equal to the threshold memory allocation. 3. The computer program of claim 1 , wherein, to detect that the threshold memory utilization has been met, the set of instructions when executed by the one or more processors is operable to cause the computing system to: obtain a GC notification from a memory system, the GC notification indicating that a GC process for the current GC cycle has been initiated, and the GC process is initiated when the threshold memory utilization is met. 4. The computer program of claim 3 , wherein the set of instructions when executed by the one or more processors is operable to cause the computing system to: obtain, as part of the CTI, a total aggregated memory allocated for each currently executing thread via a GarbageCollectorMXBean interface; obtain, as another part of the CTI, other metadata associated with each currently executing thread; obtain the PTI from a heap memory; and store the CTI in the heap memory as PTI for a next GC cycle. 5. The computer program of claim 4 , wherein the set of instructions when executed by the one or more processors is operable to cause the computing system to: generate a thread allocation record for the one or more threads to include the aggregate thread memory allocation; and generate a thread allocation snapshot to include the thread allocation record and one or more other thread allocation records. 6. The computer program of claim 5 , wherein the set of instructions when executed by the one or more processors is operable to cause the computing system to: generate a new thread allocation record for a thread of the one or more threads when the PTI of the thread does not indicate that individual threads ran during the previous GC cycle; and determine the aggregate thread memory allocation for the one or more threads to be a current thread memory allocation of the thread. 7. The computer program of claim 5 , wherein the set of instructions when executed by the one or more processors is operable to cause the computing system to: insert the aggregate thread memory allocation into a thread allocation record for a thread of the one or more threads when the PTI of the thread indicates that the thread ran during the previous GC cycle. 8. The computer program of claim 5 , wherein the set of instructions when executed by the one or more processors is operable to cause the computing system to: store the thread allocation snapshot in a memory system; and generate the indication that the one or more threads have met or exceeded a threshold memory allocation based on the thread allocation snapshot. 9. A computing system comprising: a processor system communicatively coupled with a memory system, the memory system configurable to store program code of a Thread Allocation Monitor (TAM) including a Thread Information Agent (TIA), the processor system configurable to operate the TAM to: obtain, from a Memory Management Notification (MMN) entity, an instruction to determine thread memory allocation for currently running threads, the instruction being based on a trigger of a current garbage collection (GC) cycle, operate the TIA to collect current thread information (CTI) of each currently executing thread of a set of currently executing threads based on the trigger, obtain previous thread information (PTI) of each currently executing thread that ran during a previous GC cycle, both the CTI and the PTI comprising an application to which the respective thread belongs, a thread name, a thread ID, an allocated memory, and a stack name of a stack to which the thread belongs, generate a thread allocation snapshot comprising a thread allocation record for each of the currently executing threads, each thread allocation record indicating an aggregate thread memory allocation for a corresponding currently executing thread of the currently executing threads and an application to which the corresponding currently executing thread belongs, the aggregate thread memory allocation being a difference between a current thread memory allocation for each currently executing thread during the current GC cycle and a previous thread memory allocation for each currently executing thread during the previous GC cycle, and store the thread allocation snapshot in the memory system; and an interface system communicatively coupled with the processor system, the interface system configurable to: transmit a report based on the thread allocation snapshot to a user system, the report indicating the at least one feature of at least one application including one or more threads of the set of currently executing threads that potentially triggered the current GC cycle; and receive, from the user system, an instruction to disable or correct at least one feature of at least one application including one or more threads of the currently executing threads that potentially triggered the current GC cycle. 10. The computing system of claim 9 , wherein the processor system is configurable to: identify individual threads of the currently executing threads having an aggregate thread memory allocation greater than or equal to a threshold memory allocation; and disable the identified individual threads. 11. The computing system of claim 9 , wherein the processor system is configurable to operate a memory management notification entity to: obtain a GC notification from a garbage collector, the GC notification indicating that the current GC cycle has been triggered, and the current GC cycle is triggered when a threshold memory utilization for a heap memory has been met or exceeded; and send the trigger of the current GC cycle to the thread allocation monitor. 12. The computing system of claim 11 , wherein the processor system is configurable to: determine the aggregate thread memory allocation for each of the currently executing threads, wherein, to determine

Assignees

Inventors

Classifications

  • where the computing system component is a memory, e.g. virtual memory, cache (accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00) · CPC title

  • where the computing system is distributed, e.g. networked systems, clusters, multiprocessor systems (multiprogramming arrangements G06F9/46; allocation of resources G06F9/50) · CPC title

  • for load management (allocation of a server based on load conditions G06F9/505; load rebalancing G06F9/5083; redistributing the load in a network by a load balancer H04L67/1029) · CPC title

  • Threshold · CPC title

  • G06F9/5016Primary

    the resource being the memory · CPC title

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Frequently asked questions

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What does patent US10860377B2 cover?
Systems, methods, and computer-readable media for identifying and managing memory allocation for one or more threads are described. A computer system may detect that a threshold memory utilization has been met, and may determine an aggregate memory allocation for a thread. The aggregate memory allocation may be a difference between a first memory allocation for the thread at a first time that t…
Who is the assignee on this patent?
Salesforce Com Inc
What technology area does this patent fall under?
Primary CPC classification G06F9/5016. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 08 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).