Automatic data bus wire integrity verification device

US10859637B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10859637-B2
Application numberUS-201715797780-A
CountryUS
Kind codeB2
Filing dateOct 30, 2017
Priority dateDec 19, 2014
Publication dateDec 8, 2020
Grant dateDec 8, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A device for verifying wire connectivity of a bus may include a bus connector configured to connect to a bus comprising a plurality of wires and measurement circuitry configured to perform a verification test on each wire of the bus. The verification test of each wire may include connecting a wire under test in a predetermined configuration relative to the other wires for performing the verification test and measuring a value of an electrical parameter associated with the wire under test. The verification test may also include comparing the value of the measured electrical parameter associated with the wire under test to an expected value of the electrical parameter. The wire under test passes the verification test in response to the measured value of the electrical parameter corresponding substantially to the expected value of the electrical parameter.

First claim

Opening claim text (preview).

What is claimed is: 1. A device for verifying wire integrity of a bus, comprising: a bus connector configured to connect the device to a bus comprising a plurality of wires, wherein the bus comprises pin configuration settings and the device is configured to read the pin configuration settings of the bus and verify that the bus is being connected to a valid or proper data concentrator of a multiplicity of data concentrators based on the pin configuration settings; and measurement circuitry configured to perform a verification test on at least some of the wires of the bus. 2. The device of claim 1 , wherein the verification test comprises: connecting a wire under test in a predetermined configuration relative to the other wires for performing the verification test; measuring a value of an electrical parameter associated with the wire under test; and comparing the measured value of the electrical parameter associated with the wire under test to an expected value of the electrical parameter, the wire under test passing the verification test in response to the measured value of the electrical parameter corresponding substantially to the expected value of the electrical parameter. 3. The device of claim 2 , wherein the verification test further comprises: detecting a short circuit between the wire under test and another wire of the bus; detecting a short circuit between the wire under test and a ground potential; and indicating that the wire under test passed the verification test in response to not detecting the short circuit between the wire under test and the other wire of the bus and not detecting the short circuit between wire under test and the ground potential. 4. The device of claim 3 , wherein detecting the short circuit between the wire under test and the other wire of the bus comprises: connecting the wire under test to ground by the measurement circuitry; connecting the other wire to a voltage source of the device by the measurement circuitry; measuring a voltage across a sense resistor associated with the wire under test by the measurement circuitry; and comparing the measured voltage to an expected voltage for the wire under test by the measurement circuitry, the short circuit between the wire under test and the other wire of the bus being detected in response to the measured voltage not corresponding substantially to the expected voltage. 5. The device of claim 3 , wherein detecting the short circuit between the wire under test and the ground potential comprises: connecting a ground of an airplane including the bus to a ground of the device by the measurement circuitry; removing any connections to other wires of the bus by the measurement circuitry; connecting the wire under test to a voltage source of the device by the measurement circuitry; measuring a voltage across a sense resistor associated with the wire under test by the measurement circuitry; and comparing the measured voltage to an expected voltage for the wire under test by the measurement circuitry, wherein the short circuit between the wire under test and the ground potential being detected in response to the measured voltage not corresponding substantially to the expected voltage. 6. The device of claim 1 , further comprising a hand-holdable portable housing, the measurement circuitry being contained within the housing. 7. The device of claim 6 , further comprising a user interface for controlling operation of the device provided on a face of the housing. 8. The device of claim 7 , wherein the user interface comprises a display for providing information related to the verification test. 9. The device of claim 8 , wherein the information comprises test results of the verification test on at least some of the wires of the bus. 10. The device of claim 8 , wherein the information comprises an identification of the bus on which the verification test is being performed based on reading the pin configuration settings of the bus by the device. 11. The device of claim 1 , further comprising a connector for connecting the measurement circuitry to a mobile computer device, the mobile computer device being configured for controlling operation of the device and storing results of the verification test of at least some of the wires of the bus. 12. A device for verifying wire integrity of a bus, comprising: a bus connector configured to connect the device to a controller area network (CAN) bus connector, the CAN bus connector being configured for connecting a CAN bus to a data concentrator, the CAN bus comprising a shielded twisted pair of wires including a CAN high wire, a CAN low wire and a CAN shield wire, wherein the CAN bus comprises a pin configuration setting and the device is configured to read the pin configuration setting of the CAN bus and verify that the CAN bus is being connected to the data concentrator that is a valid or proper data concentrator of a multiplicity of data concentrators; and measurement circuitry configured to perform a verification test on at least the CAN high wire and CAN low wire of the CAN bus. 13. The device of claim 12 , further comprising a module to read the pin configuration setting of the CAN bus to determine an identification of the data concentrator from the pin configuration setting. 14. The device of claim 13 , further comprising a user interface, the user interface comprising: features for controlling operation of the device; and a display for providing information related to the verification test, the information comprising an identification of the data concentrator associated with CAN bus on which the verification test is being performed and test results of the verification test. 15. The device of claim 12 , wherein the verification test of a particular CAN bus comprises: connecting a wire under test in a predetermined configuration relative to the other wires for performing the verification test; measuring a value of an electrical parameter associated with the wire under test; and comparing the measured value of the electrical parameter associated with the wire under test to an expected value of the electrical parameter, the wire under test passing the verification test in response to the measured value of the electrical parameter corresponding substantially to the expected value of the electrical parameter. 16. The device of claim 15 , wherein the verification test of the particular CAN bus further comprises: detecting a short circuit between a particular CAN high wire under test and an associated CAN low wire by the measurement circuitry; detecting a short circuit between the particular CAN high wire under test and a ground potential by the measurement circuitry; and detecting a short circuit between the associated CAN low wire and a ground potential by the measurement circuitry, the particular CAN bus passing the verification test in response to not detecting any short circuits. 17. The device of claim 16 , wherein the CAN bus is onboard an airplane and wherein detecting the short circuit between the particular CAN high wire under test and the associated CAN low wire comprises: connecting the associated CAN low wire to ground potential; removing any connection of the device to a ground of the airplane; connecting the particular CAN high wire to a voltage source of the device; measuring a voltage across a sense resistor associated with the particular CAN high wire; and comparing the measured voltage to an expected voltage for the particular CAN high wire, the short circuit between the particular CAN high wire under test and the

Assignees

Inventors

Classifications

  • G01R31/52Primary

    Testing for short-circuits, leakage current or ground faults · CPC title

  • Testing of lines, cables or conductors (testing of electric windings G01R31/72) · CPC title

  • on air- or spacecraft, railway rolling stock or sea-going vessels · CPC title

  • to test buses, lines or interfaces, e.g. stuck-at or open line faults · CPC title

  • G01R31/50Primary

    Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections (testing of sparking plugs H01T13/58) · CPC title

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What does patent US10859637B2 cover?
A device for verifying wire connectivity of a bus may include a bus connector configured to connect to a bus comprising a plurality of wires and measurement circuitry configured to perform a verification test on each wire of the bus. The verification test of each wire may include connecting a wire under test in a predetermined configuration relative to the other wires for performing the verific…
Who is the assignee on this patent?
Boeing Co
What technology area does this patent fall under?
Primary CPC classification G01R31/52. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 08 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).