Thermal pile sensing structure integrated with capacitor

Patent metadata

Field	Value
Publication number	US-10859442-B2
Application number	US-201916503517-A
Country	US
Kind code	B2
Filing date	Jul 4, 2019
Priority date	Nov 12, 2015
Publication date	Dec 8, 2020
Grant date	Dec 8, 2020

Abstract

The present invention discloses a thermal pile sensing structure integrated with one or more capacitors, which includes: a substrate, an infrared sensing unit and a partition structure. The infrared sensing unit includes a first and a second sensing structure. A hot junction is formed between the first and the second sensing structures at a location where the first and the second sensing structures are close to each other. A cold junction is formed between the partition structure and the first sensing structure at a location where these two structures are close to each other. Another cold junction is formed between the partition structure and the second sensing structure at a location where these two structures are close to each other. A temperature difference between the hot junction and the cold junction generates a voltage difference signal. Apart of the partition structure forms at least one capacitor.

First claim

What is claimed is:

1. A thermal pile sensing structure, comprising:
a substrate, having a surface plane (X-Y plane) and a normal direction (Z-direction) which is perpendicular to the surface plane;
an infrared sensing unit located above the substrate; and
a partition structure, which extends in the Z-direction and around the infrared sensing unit;
wherein at least one cold junction is a part of a structure including the infrared sensing unit and the partition structure; and
wherein at least one hot junction is a part of the infrared sensing unit;
wherein a temperature difference between the hot junction and the cold junction generates a voltage difference signal and a part of the partition structure has at least one capacitor having an upper electrode and a lower electrode, wherein the upper electrode is located at a higher level than the lower electrode in the Z-direction.

2. The thermal pile sensing structure of claim 1 , wherein the at least one capacitor includes a Metal-Insulator-Metal (MIM) capacitor or a Polysilicon-Insulator-Polysilicon (PIP) capacitor.

3. The thermal pile sensing structure of claim 2 , wherein the partition structure includes a stack of metal layers and via layers, and the MIM capacitor includes the upper electrode and the lower electrode which are formed by the metal layers.

4. The thermal pile sensing structure of claim 2 , wherein the partition structure includes a stack of metal layers, via layers and polysilicon layers, and wherein the PIP capacitor includes the upper electrode and the lower electrode which are formed by the polysilicon layers.

5. The thermal pile sensing structure of claim 1 , further comprising:
a dielectric layer located on or above the substrate, wherein the infrared sensing unit and the partition structure are formed within the dielectric layer.

6. The thermal pile sensing structure of claim 5 , further comprising:
a bonding layer located on or above the dielectric layer; and
a light filter layer for filtering out signals other than infrared light signals, wherein the light filter layer is connected to the dielectric layer via the bonding layer.

7. The thermal pile sensing structure of claim 1 , wherein the temperature difference between the hot junction and the cold junction is processed by a transistor circuit to generate the voltage difference signal, the transistor circuit being formed on the substrate.

Assignees

• Pixart Imaging Inc

Inventors

• Tsai Ming-Han
• Wang Shin-Lin

Classifications

• G01J5/16 Primary

  Arrangements with respect to the cold junction; Compensating influence of ambient temperature or other variables · CPC title

• G01J5/024

  Special manufacturing steps or sacrificial layers or layer structures · CPC title

• G01J5/12

  using thermoelectric elements, e.g. thermocouples · CPC title