High-efficiency holdup circuit for switch-mode power supply
US-2018301988-A1 · Oct 18, 2018 · US
US10855104B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10855104-B2 |
| Application number | US-201815920488-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 14, 2018 |
| Priority date | Mar 14, 2018 |
| Publication date | Dec 1, 2020 |
| Grant date | Dec 1, 2020 |
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In one embodiment, a power apparatus, includes at least one first and second power supply to receive power from a main power supply, the at least one first power supply including at least one first input capacitor to smooth voltage ripples, a voltage monitor to monitor voltage provided by the main power supply, and cause enablement and/or disablement of at least one part of the at least one first power supply according to the voltage provided by the main power supply, and at least one first blocking and passing component configured to selectively channel energy from the main power supply to charge the at least one first input capacitor during a time when the at least one part is enabled, and channel energy from the at least one first input capacitor to the at least one second power supply during a time when the at least one part is disabled.
Opening claim text (preview).
What is claimed is: 1. A power apparatus, comprising: at least one first power supply configured to receive power from a main power supply, the at least one first power supply including at least one first input capacitor to smooth voltage ripples and store energy; at least one second power supply configured to receive power from the main power supply; a voltage monitor configured to monitor a voltage provided by the main power supply to the power apparatus, the voltage monitor being configured to cause enablement and/or disablement of at least one part of the at least one first power supply according to the voltage provided by the main power supply to the power apparatus; and at least one first blocking and passing component which is configured to selectively: channel energy from the main power supply to charge the at least one first input capacitor when the at least one part of the at least one first power supply is enabled; and channel the energy from the at least one first input capacitor to the at least one second power supply when the at least one part of the at least one first power supply is disabled, wherein the at least one first blocking and passing component comprises a first blocking and passing element and a second blocking and passing element that are connected in parallel between the at least one first input capacitor and an input capacitor of the at least one second power supply. 2. The apparatus according to claim 1 , further comprising a hold-up circuit including: a storage capacitor; a second blocking and passing component; and a third blocking and passing component, wherein: the storage capacitor is configured to charge from the main power supply; the second blocking and passing component is configured to inhibit the storage capacitor discharging towards the main power supply; and the third blocking and passing component is configured to selectively, under control of the voltage monitor, allow discharge of energy stored in the storage capacitor to the at least one second power supply. 3. The apparatus according to claim 2 , further comprising a fourth blocking and passing component to inhibit the at least one first input capacitor discharging to the storage capacitor of the hold-up circuit. 4. A power apparatus, comprising: at least one first power supply configured to receive power from a main power supply, the at least one first power supply including at least one first input capacitor to smooth voltage ripples and store energy; at least one second power supply configured to receive power from the main power supply; a voltage monitor configured to monitor a voltage provided by the main power supply to the power apparatus, the voltage monitor being configured to cause enablement and/or disablement of at least one part of the at least one first power supply according to the voltage provided by the main power supply to the power apparatus; and at least one first blocking and passing component which is configured to selectively: channel energy from the main power supply to charge the at least one first input capacitor when the at least one part of the at least one first power supply is enabled; and channel the energy from the at least one first input capacitor to the at least one second power supply when the at least one part of the at least one first power supply is disabled, wherein: the at least one first blocking and passing component includes a first diode and a second diode; the first diode is configured to connect the main power supply to the at least one first power supply; the second diode is configured to connect the at least one first power supply with the at least one second power supply; when the first diode is forward biased, the at least one first input capacitor is being charged by the main power supply; and when the second diode is forward biased, the at least one first input capacitor is being discharged to the at least one second power supply. 5. The apparatus according to claim 4 , wherein: the at least one second power supply includes at least one second input capacitor; and the second diode is forward biased as a result of the at least one part of the at least one first power supply being disabled and a voltage in the at least one second input capacitor of the at least one second power supply is dropping faster than the voltage in the at least one first input capacitor of the at least one first power supply. 6. The apparatus according to claim 3 , further comprising: a fifth blocking and passing component to inhibit the at least one first input capacitor discharging towards the main power supply. 7. The apparatus according to claim 1 , wherein: the at least one first blocking and passing component includes a first transistor and a second transistor; the first transistor is configured to connect the main power supply to the at least one first power supply; the second transistor is configured to connect the at least one first power supply with the at least one second power supply; when the first transistor is on, the at least one first input capacitor is being charged by the main power supply; when the second transistor is on, the at least one first input capacitor is being discharged to the at least one second power supply; and the voltage monitor is configured to cause selective switching of the first transistor and the second transistor. 8. The apparatus according to claim 7 , wherein the at least one first blocking and passing component includes an inverter connected to the first transistor or the second transistor. 9. The apparatus according to claim 1 , wherein each power supply of the at least one first power supply and the at least one second power supply includes a point of load. 10. The apparatus according to claim 9 , wherein the point of load includes a voltage step-up or step-down arrangement. 11. The apparatus according to claim 1 , wherein the at least one second power supply is configured to supply power to at least one dying gasp event when the main power supply fails. 12. The apparatus according to claim 1 , wherein, in response to the voltage monitor determining that the main power supply is providing adequate voltage to the power apparatus, the voltage monitor is configured to transmit a signal to the at least one first power supply to cause enablement of the at least one part of the at least one first power supply. 13. The apparatus according to claim 12 , wherein: the at least one first blocking and passing component includes a first transistor and a second transistor; the first transistor is configured to connect the main power supply to the at least one first power supply; the second transistor is configured to connect the at least one first input capacitor with the at least one second power supply; the voltage monitor is configured to cause selective switching of the first transistor and the second transistor based on at least one signal applied to the first transistor and the second transistor; when the first transistor is on, the at least one first input capacitor is being charged by the main power supply; and when the second transistor is on, the at least one first input capacitor is being discharged to the at least one second power supply. 14. The apparatus according to claim 12 , further comprising a hold-up circuit including: a storage capacitor; a second blocking and passing component; and a third blocking and passing component, wherein: the storage capacitor is configured to charge from the main power supply; the second blocking and passing component is configured to inhibit the storage capacitor dischar
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