Crystal oscillator

US10848102B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10848102-B2
Application numberUS-201916423069-A
CountryUS
Kind codeB2
Filing dateMay 27, 2019
Priority dateMar 9, 2018
Publication dateNov 24, 2020
Grant dateNov 24, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided is a crystal oscillator, including: a crystal; an oscillating circuit including a first oscillating transistor and a second oscillating transistor, where the first oscillating transistor and the second oscillating transistor are configured to provide transconductance for starting oscillation and maintaining oscillation of the crystal; a first driving circuit configured to generate a stable reference current; and a second driving circuit, configured to supply an operating voltage to the oscillating circuit and make an operating current of the first oscillating transistor and the second oscillating transistor be a stable current according to the reference current, where the operating voltage is used to control the first oscillating transistor and the second oscillating transistor to operate in a sub-threshold region.

First claim

Opening claim text (preview).

What is claimed is: 1. A crystal oscillator, comprising: a crystal; an oscillating circuit comprising a first oscillating transistor and a second oscillating transistor, wherein the first oscillating transistor and the second oscillating transistor are configured to provide transconductance for starting oscillation and maintaining oscillation of the crystal; a first driving circuit configured to generate a stable reference current; and a second driving circuit, configured to supply an operating voltage to the oscillating circuit and make an operating current of the first oscillating transistor and the second oscillating transistor be a stable current according to the reference current, wherein the operating voltage is configured to control the first oscillating transistor and the second oscillating transistor to operate in a sub-threshold region; wherein the second driving circuit comprises a negative feedback loop configured to receive the reference current generated by the first driving circuit and generate the operating voltage according to the reference current; wherein the negative feedback loop comprises a first current control transistor and a second current control transistor, and the first current control transistor and the second current control transistor are configured to control the operating current of the first oscillating transistor and the second oscillating transistor to be the stable current; wherein connection structures of the first current control transistor and the second current control transistor is the same as connection structures of the first oscillating transistor and the second oscillating transistor. 2. The crystal oscillator according to claim 1 , wherein a ratio of sizes of the first oscillating transistor and the first current control transistor is equal to a ratio of sizes of the second oscillating transistor and the second current control transistor. 3. The crystal oscillator according to claim 1 , wherein the negative feedback loop further comprises a third current control transistor, an amplifier and a first voltage control transistor, wherein the third current control transistor is configured to control the operating current of the first oscillating transistor and the second oscillating transistor, and the amplifier outputs the operating voltage to the oscillating circuit through the first voltage control transistor; a drain of the third current control transistor is connected to the first driving circuit and is configured to receive the reference current output by the first driving circuit, a gate of the first current control transistor is connected to a drain of the first current control transistor, a gate of the second current control transistor is connected to a drain of the second current control transistor, and a gate of the third current control transistor is connected to the drain of the third current control transistor; and the drain of the third current control transistor is further connected to a first input end of the amplifier, a second input end of the amplifier is connected to the drain of the first current control transistor and the drain of the second current control transistor, an output end of the amplifier is connected to a gate of the first voltage control transistor, a source of the first current control transistor is connected to a drain of the first voltage control transistor, and the drain of the first voltage control transistor is configured to output the operating voltage. 4. The crystal oscillator according to claim 3 , wherein a ratio of sizes of the first oscillating transistor and the first current control transistor is N:M, a ratio of sizes of the second oscillating transistor, the second current control transistor and the third current control transistor is N:M:L, and the operating current of the first oscillating transistor and the second oscillating transistor is I ref N/L, wherein I ref is the reference current. 5. The crystal oscillator according to claim 1 , wherein the negative feedback loop further comprises a fourth current control transistor and a second voltage control transistor, wherein the fourth current control transistor is configured to control the operating current of the first oscillating transistor and the second oscillating transistor, the second voltage control transistor is configured to output the operating voltage to the oscillating circuit, and a drain of the fourth current control transistor is connected to the first driving circuit and is configured to receive the reference current output by the first driving circuit; the drain of the fourth current control transistor is further connected to a gate of the second voltage control transistor, a gate of the fourth current control transistor is connected to a gate of the first current control transistor and a gate of the second current control transistor, the gate of the first current control transistor is connected to a drain of the first current control transistor, and the gate of the second current control transistor is connected to a drain of the second current control transistor; and a source of the first current control transistor is connected to a source of the second voltage control transistor, and the source of the second voltage control transistor is configured to output the operating voltage. 6. The crystal oscillator according to claim 1 , wherein a first capacitor is further connected between a source of the first current control transistor and the ground, and the first capacitor is configured to perform phase compensation on the operating voltage. 7. The crystal oscillator according to claim 1 , wherein the first driving circuit is further configured to control an amplitude of an oscillating signal input to the crystal. 8. The crystal oscillator according to claim 7 , wherein the first driving circuit comprises a first bias transistor, a second bias transistor, a third bias transistor, a fourth bias transistor, a fifth bias transistor, a sixth bias transistor, and a second capacitor; wherein a drain of the first bias transistor is connected to a drain of the third bias transistor, the drain of the first bias transistor is connected to a gate of the first bias transistor, a drain of the second bias transistor is connected to a drain of the fourth bias transistor, the gate of the first bias transistor is connected to a gate of the second bias transistor, and a gate of the third bias transistor is connected to the drain of the fourth bias transistor; a drain of the fifth bias transistor is connected to the drain of the fourth bias transistor, a source of the fifth bias transistor is connected to the gate of the fourth bias transistor, the gate of the fourth bias transistor is further connected to one end of the second capacitor, and the other end of the second capacitor is configured to input the oscillating signal; and a gate of the sixth bias transistor is connected to the gate of the second bias transistor, a source of the sixth bias transistor, a source of the first bias transistor and a source of the second bias transistor are connected to a power supply voltage, and a drain of the sixth bias transistor is configured to output the reference current. 9. The crystal oscillator of claim 8 , wherein when an AC signal in the oscillating signal increases, a drain voltage of the fourth bias transistor decreases, drain currents of the first bias transistor, the second bias transistor, and the third bias transistor decrease, the reference current output by the first driving circuit decreases, the operating current of the first oscillating transistor and the second oscillating transistor decreases, the transconductance of the first oscillating transistor and the second oscillating transistor

Assignees

Inventors

Classifications

  • Generators characterised by the type of circuit or by the means used for producing pulses (H03K3/64 - H03K3/84 take precedence) · CPC title

  • Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature · CPC title

  • the amplifier comprising one or more field effect transistors · CPC title

  • H03B5/364Primary

    the amplifier comprising field effect transistors (H03B5/366 takes precedence) · CPC title

  • Modifications of generator to ensure starting of oscillations · CPC title

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What does patent US10848102B2 cover?
Provided is a crystal oscillator, including: a crystal; an oscillating circuit including a first oscillating transistor and a second oscillating transistor, where the first oscillating transistor and the second oscillating transistor are configured to provide transconductance for starting oscillation and maintaining oscillation of the crystal; a first driving circuit configured to generate a st…
Who is the assignee on this patent?
Shenzhen Goodix Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H03B5/364. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 24 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).