Display device

Patent metadata

Field	Value
Publication number	US-10847097-B2
Application number	US-201916533013-A
Country	US
Kind code	B2
Filing date	Aug 6, 2019
Priority date	Oct 8, 2018
Publication date	Nov 24, 2020
Grant date	Nov 24, 2020

Abstract

The display device according to the present disclosure may comprise a display panel including data lines and scan lines crossing each other and pixels disposed in a plurality of horizontal lines; a data driving circuit configured to supply data voltages to the data lines; a gate driving circuit configured to supply scan signals for applying the data voltages to the pixels and to supply reset signals for turning off the pixels that are emitting light to the pixels through the scan lines; and a timing controller configured to cause first pixels in a first area to simultaneously emit light and simultaneously stop emitting light, and cause second pixels in a second area different than the first area to sequentially emit light and sequentially stop emitting light by controlling the data driving circuit and the gate driving circuit.

First claim

What is claimed is:

1. A display panel, comprising:
a display panel having a display area and including data lines and scan lines crossing each other and pixels disposed in a plurality of horizontal lines;
a data driving circuit configured to supply data voltages to the data lines;
a gate driving circuit configured to supply scan signals for applying the data voltages to the pixels and to supply reset signals for turning off the pixels that are emitting light to the pixels through the scan lines;
a timing controller configured to cause first pixels in a first area to simultaneously emit light and simultaneously stop emitting light, and cause second pixels in a second area different than the first area to sequentially emit light and sequentially stop emitting light by controlling the data driving circuit and the gate driving circuit,
wherein the first area includes a central portion in the display area, and the second area includes a peripheral area except for the central portion in the display area; and
a power control transistor disposed between the pixels and a power line, wherein the timing controller is configured to turn off the power control transistor while addressing data to the first pixels and turn on the power control transistor when the addressing data to the first pixels is completed.

2. The display device of claim 1 , wherein the timing controller is configured to cause the first pixels to simultaneously emit light after applying the data voltages to all the first pixels, and to cause the second pixels to sequentially emit light while sequentially applying the data voltages to the second pixels.

3. The display device of claim 2 , wherein the timing controller is configured to cause the first pixels to simultaneously stop emitting light after an emission duration elapses since the first pixels simultaneously emit light, and to cause the second pixels to sequentially stop emitting light after the emission duration elapses since the second pixels sequentially emit light in a unit of the plurality of horizontal lines.

4. The display device of claim 1 , wherein the first area is disposed at a center of the display panel with respect to a first direction in which the data lines travel, wherein the second area is divided into third and fourth areas on upper and lower sides, respectively, of the first area with respect to the first direction, and
wherein the timing controller is configured to alternately perform a first scan operation in the third area and a second scan operation in the fourth area at an interval of one horizontal period in a ping-pong addressing manner.

5. The display device of claim 4 , wherein the timing controller is configured to alternately perform an upward scan operation and a downward scan operation at the interval of one horizontal period in the ping-pong addressing manner, the upward scan operation proceeding from a center of the first area toward the third area with respect to the first direction, the downward scan operation proceeding from the center of the first area toward the fourth area with respect to the first direction, or
wherein the timing controller is configured to perform a scan operation from a first boundary of the first area toward a second boundary of the first area with respect to the first direction in a sequential addressing manner.

6. The display device of claim 1 , wherein the first area is disposed at a center of the display panel with respect to a first direction in which the data lines travel, wherein the second area is divided into a third area and a fourth area on one side and an opposite side, respectively, of the first area with respect to the first direction, and
wherein the timing controller is configured to perform a scan operation for the third area in a sequential addressing manner after performing another scan operation from a boundary of the first area and the third area toward the fourth area in the sequential addressing manner.

7. The display device of claim 1 , wherein the first area is disposed at one end of the display panel with respect to a first direction in which the data lines travel, and wherein the timing controller is configured to perform a scan operation in a direction from the first area toward the second area in a sequential addressing manner.

8. The display device of claim 1 , wherein the timing controller is configured to adjust an emission duration by varying a first scan speed at which the data voltages are applied to the first pixels in the first area and a second scan speed at which the data voltages are applied to the second pixels in the second area, the first scan speed equal to the second scan speed, the emission duration being a time interval from a point at which the pixels are turned on to a point at which the pixels are turned off.

9. The display device of claim 8 , wherein the timing controller is configured to make the emission duration in the second area gradually decrease as a distance from the first area increases by making a third scan speed of the reset signals for turning off the second pixels in the second area be higher than the second scan speed.

10. The display device of claim 9 , wherein the timing controller is configured to adjust data gradation corresponding to the data voltages applied to the second pixels in the second area upward as the distance from the first area increases.

11. The display device of claim 1 , wherein the timing controller is configured to adjust an emission duration from a point at which the pixels are turned on to a point at which the pixels are turned off, by varying a first scan speed at which the data voltages are supplied to the first pixels in the first area to be different from a second scan speed at which the data voltages are supplied to the second pixels in the second area.

12. The display device of claim 1 , wherein when changing a width of the first area with respect to a first direction in which the data lines travel, the timing controller is configured to adjust a light emission start point at which the first pixels are simultaneously turned on back and forth by using a first scan speed at which the data voltages are applied to the first pixels in the first area and a second scan speed at which the data voltages are applied to the second pixels in the second area equal to the first scan speed, or varying the first scan speed and the second scan speed while fixing the light emission start point.

13. The display device of claim 1 , wherein the timing controller is configured to lower a power supply voltage supplied to the pixels by controlling a power generator responsive to increasing an emission duration from a point at which the pixels are turned on to a point at which the pixels are turned off.

14. The display device of claim 1 , wherein each of the pixels comprises:
a light emitting element,
a driving transistor for controlling a driving current through the light emitting element according to a gate-source voltage,
a first transistor for connecting the data line and a gate electrode of the driving transistor according to the scan signals,
a capacitor for storing the data voltages applied through the data line, and
a second transistor for initializing the driving transistor and the light emitting element and turning off the light emitting element according to the reset signals.

15. The display device of claim 14 , wherein the gate driving circuit is configured to simultaneously supply the reset signals to the first pixels after an emission duration elapses since the first pixels are simultaneously turned on, and to sequentially supply the reset signals to the s

Assignees

• Lg Display Co Ltd

Inventors

• Park Dongwon

Classifications

• G09G3/3233

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G2330/028

  Generation of voltages supplied to electrode drivers in a matrix display other than LCD · CPC title

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G2310/0202

  Addressing of scan or signal lines · CPC title

• G09G3/3266 Primary

  Details of drivers for scan electrodes · CPC title