Apparatuses and methods involving independent modulations of a digital clock signal for different frequency domains

Patent metadata

Field	Value
Publication number	US-10841016-B2
Application number	US-201916284469-A
Country	US
Kind code	B2
Filing date	Feb 25, 2019
Priority date	Jan 9, 2019
Publication date	Nov 17, 2020
Grant date	Nov 17, 2020

Abstract

An example apparatus that employs circuitry operating in response to digital clock signal circuitry. The apparatus includes first circuitry and second circuitry. The first circuitry produces a high-frequency digital clock signal characterized by a high frequency which carries radiative noise interference and by a modulated low-frequency digital clock signal characterized by a low frequency modulated by a first type of modulation. The second circuitry produces another low-frequency digital clock signal by combining a disparate modulation signal and a feedback signal derived from the other low-frequency digital clock signal, wherein the disparate modulation signal is characterized by modulating the feedback signal via a second type of modulation that is independent of the first type of modulation and by cancellation/blocking of the radiative noise interference manifested by the circuitry operating in response to the digital clock signal circuitry.

First claim

What is claimed is:

1. An apparatus employing circuitry operating in response to digital clock signal circuitry, the apparatus comprising:
first circuitry configured and arranged to produce a high-frequency digital clock signal characterized by a high frequency which carries radiative noise interference and by a modulated low-frequency digital clock signal characterized by a low frequency modulated by a first type of modulation; and
second circuitry configured and arranged to produce another low-frequency digital clock signal by combining a disparate modulation signal and a feedback signal derived from the other low-frequency digital clock signal, wherein the disparate modulation signal is characterized by modulating the feedback signal via a second type of modulation that is independent of the first type of modulation and by cancellation or blocking of the radiative noise interference manifested by the circuitry operating in response to the digital clock signal circuitry.

2. The apparatus of claim 1 , further including the circuitry configured and arranged to operate in response to the digital clock signal circuitry.

3. The apparatus of claim 1 , wherein the first circuitry includes a pseudo-random modulator and includes a frequency modulation (FM) oscillator configured to produce the high-frequency digital clock signal as a function of the pseudo-random modulator.

4. The apparatus of claim 1 , wherein the high-frequency digital clock signal is produced as a function of pseudo-random frequency modulation and based on at least four percent of an average non-modulated frequency.

5. The apparatus of claim 1 , wherein the first circuitry includes a pseudo-random modulator.

6. The apparatus of claim 1 , wherein the second circuitry includes a triangular modulator and frequency divider circuitry configured and arranged to produce the other low-frequency digital clock signal as a function of the disparate modulation signal.

7. The apparatus of claim 1 , wherein the first circuitry and second circuitry are configured and arranged to use a main clock signal to produce the high-frequency digital clock signal and the other low-frequency digital clock signal having independent modulation schemes.

8. The apparatus of claim 1 , further including a power circuit operating by a battery, wherein the power circuit contributes to the radiative noise interference.

9. The apparatus of claim 1 , further including a third circuitry configured and arranged to produce an additional low-frequency digital clock signal by combining another disparate modulation signal and another feedback signal derived from the additional low-frequency digital clock signal, wherein the other disparate modulation signal is characterized by modulating the other feedback signal via another type of modulation that is independent of the first type of modulation and by cancellation of the radiative noise interference in the additional low-frequency digital clock signal as produced by the third circuitry.

10. The apparatus of claim 1 , wherein the other type of modulation is independent of the first and second type of modulation.

11. The apparatus of claim 1 , wherein the first circuitry and the second circuitry are configured and arranged to improve electromagnetic compatibility (EMC) in both high and low frequency domains by spreading dynamic current on both direct current (DC)/DC switching and digital switching, thereby reducing peak currents and facilitating efficiency of clock modulation associated with modulation of a main clock and modulation of divided portion of the main clock.

12. The apparatus of claim 1 , wherein the first circuitry and second circuitry are configured and arranged to provide independent clock modulation of a main clock.

13. A method involving an apparatus employing circuitry operating in response to digital clock signal circuitry, the method comprising:
producing, via first circuitry of the apparatus, a high-frequency digital clock signal characterized by a high frequency which carries radiative noise interference and by a modulated low-frequency digital clock signal characterized by a low frequency modulated by a first type of modulation; and
producing, via second circuitry of the apparatus, another low-frequency digital clock signal by combining a disparate modulation signal and a feedback signal derived from the other low-frequency digital clock signal, wherein the disparate modulation signal is characterized by modulating the feedback signal via a second type of modulation that is independent of the first type of modulation and by cancellation or blocking of the radiative noise interference manifested by the circuitry operating in response to the digital clock signal circuitry.

14. The method of claim 13 , further including producing the other low-frequency digital clock signal as a function of the disparate modulation signal.

15. The method of claim 13 , further including producing, via a third circuitry of the apparatus, an additional low-frequency digital clock signal by combining another disparate modulation signal and another feedback signal derived from the additional low-frequency digital clock signal, wherein the other disparate modulation signal is characterized by modulating the other feedback signal via another type of modulation that is independent of the first type of modulation and by cancellation or blocking of the radiative noise interference in the other low-frequency digital clock signal as produced by the third circuitry.

16. The method of claim 13 , further including producing, via a third circuitry of the apparatus, an additional low-frequency digital clock signal by combining another disparate modulation signal and another feedback signal derived from the additional low-frequency digital clock signal, wherein the other disparate modulation signal is characterized by modulating the other feedback signal via another type of modulation that is independent of both the first type of modulation and the second type of modulation and by cancellation or blocking of the radiative noise interference in the other low-frequency digital clock signal as produced by the third circuitry.

17. The method of claim 13 , further including spreading dynamic current on both direct current (DC)/DC switching and digital switching, thereby facilitating efficiency of clock modulation associated with both modulations of a main clock and modulation of divided portion of the main clock.

18. The method of claim 13 , wherein the first circuitry includes a pseudo-random modulator and a frequency modulation (FM) oscillator, the method including producing the high-frequency digital clock signal, via the FM oscillator, as a function of the pseudo-random modulator.

19. The method of claim 13 , wherein the second circuitry includes a triangular modulator and frequency divider circuitry, the method including producing the other low-frequency digital clock signal as a function of the disparate modulation signal using the triangular modular and frequency divider circuitry.

20. The method of claim 13 , further including using, via the first circuitry and the second circuitry, a main clock signal to produce the high-frequency digital clock signal and the other low-frequency digital clock signal having independent modulation schemes.

Assignees

• Nxp Usa Inc

Inventors

• Rince Jean-Christophe Patrick
• Abouda Pascal Kamel
• Desposito Domenico

Classifications

• H04B1/69

  Spread spectrum techniques · CPC title

• H03C3/095

  applying frequency modulation to the loop in front of the voltage controlled oscillator · CPC title

• H03K3/013 Primary

  Modifications of generator to prevent operation by noise or interference · CPC title

• H04B15/00 Primary

  Suppression or limitation of noise or interference (by means associated with receiver H04B1/10) · CPC title