Chopper stabilized amplifier with parallel notch filters

Patent metadata

Field	Value
Publication number	US-10840862-B2
Application number	US-201916294937-A
Country	US
Kind code	B2
Filing date	Mar 7, 2019
Priority date	Sep 19, 2018
Publication date	Nov 17, 2020
Grant date	Nov 17, 2020

Abstract

A chopper stabilized amplifier includes a first transconductance amplifier, first chopping circuitry coupled to an input of the first transconductance amplifier for chopping an input signal and applying the chopped input signal to the input of the first transconductance amplifier, and second chopping circuitry coupled to an output of the first transconductance amplifier for chopping an output signal produced by the first transconductance amplifier. A ping-pong notch filter is connected to an output of the second chopping circuitry and performs an integrate and transfer function on a chopped output signal produced by the second chopping circuitry to filter ripple voltages. The ping-pong notch filter includes parallel connected first and second notch filters, each of which has an input coupled to the output of the second chopping circuitry.

First claim

The invention claimed is:

1. A chopper stabilized amplifier, comprising:
a first transconductance amplifier;
first chopping circuitry coupled to an input of the first transconductance amplifier for chopping an input signal and applying the chopped input signal to the input of the first transconductance amplifier;
second chopping circuitry coupled to an output of the first transconductance amplifier for chopping an output signal produced by the first transconductance amplifier; and
a ping-pong notch filter comprising parallel connected first and second notch filters, wherein each of the first notch filter and the second notch filter has an input coupled to an output of the second chopping circuitry and wherein the ping-pong notch filter performs an integrate and transfer function on a chopped output signal produced by the second chopping circuitry to filter ripple voltages in the chopped output signal.

2. The chopper stabilized amplifier of claim 1 , wherein there are 90 degrees phase shift between clocks of the first notch filter and the second notch filter.

3. The chopper stabilized amplifier of claim 1 , wherein the first notch filter has first and second input terminals, and first and second output terminals, and wherein the first notch filter includes:
a first path including a first switch coupled between the first input terminal and a first node, a second switch coupled between the first node and the first output terminal, a third switch coupled between the first input terminal and a second node, a fourth switch coupled between the second node and the second output terminal;
a second path including a fifth switch coupled between the first input terminal and a third node, a sixth switch coupled between the third node and the first output terminal, a seventh switch coupled between the second input terminal and a fourth node, an eighth switch coupled between the fourth node and the second output terminal; and
a firth integrate and transfer capacitor coupled between the first and second nodes and a second integrate and transfer capacitor coupled between the third and fourth nodes.

4. The chopper stabilized amplifier of claim 3 , wherein the chopped output signal is controlled by a first clock signal, the first, third, sixth and eighth switches are controlled by a second clock signal, and the second, fourth, fifth and seventh switches are controlled by a third clock signal, wherein the frequencies of the second and third clock signals is half of the frequency of the first clock signal.

5. The chopper stabilized amplifier of claim 4 , wherein the second clock signal and the third clock signal are out of phase with each other.

6. The chopper stabilized amplifier of claim 3 , wherein the second notch filter has third and fourth input terminals, and third and fourth output terminals, and wherein the second notch filter includes:
a third path including a ninth switch coupled between the third input terminal and a fifth node, a tenth switch coupled between the fifth node and the third output terminal, an eleventh switch coupled between the fourth input terminal and a sixth node, a twelfth switch coupled between the sixth node and the fourth output terminal;
a fourth path including a thirteenth switch coupled between the third input terminal and a seventh node, a fourteenth switch coupled between the seventh node and the third output terminal, a fifteenth switch coupled between the fourth input terminal and a eighth node, an sixteenth switch coupled between the eighth node and the fourth output terminal; and
a first integrate and transfer capacitor coupled between the fifth and sixth nodes and a second integrate and transfer capacitor coupled between the seventh and eighth nodes.

7. The chopper stabilized amplifier of claim 6 , wherein the tenth, twelfth, fourteenth and fifteenth switches are controlled by a fourth clock signal and the ninth, eleventh, fourteenth and sixteenth switches are controlled by a fifth clock signal.

8. The chopper stabilized amplifier of claim 7 , wherein the fourth clock signal and the fifth clock signals have the same frequency.

9. The chopper stabilized amplifier of claim 7 , wherein the frequency of the fourth and fifth clock signals is half of the frequency of the first clock signal.

10. The chopper stabilized amplifier of claim 1 , further comprising:
a second transconductance amplifier having an input coupled to an output of the first notch filter;
a third transconductance amplifier having an input coupled to an output of the second notch filter; and
a fourth transconductance amplifier having an input coupled to an output of the second transconductance amplifier and an output of the third transconductance amplifier.

11. The chopper stabilized amplifier of claim 10 , further comprising a fifth transconductance amplifier having an input coupled to receive the input signal, and an output coupled to the outputs of the second and third transconductance amplifiers.

12. The chopper stabilized amplifier of claim 10 , further comprising a buffer coupled between the input of the first notch filter and an output of the fourth transconductance amplifier.

13. A method of operating a chopper stabilized amplifier, the method comprising:
chopping an input signal and applying the chopped input signal to an input of a first transconductance amplifier;
chopping an output signal produced by the first transconductance amplifier at a chopping frequency to produce a chopped output signal; and
performing an integrate and transfer function on a chopped output signal produced by the second chopping circuitry with a ping-pong notch filter to filter ripple voltages in the chopped output signal, wherein the ping-pong notch filter comprises parallel connected first and second notch filters.

14. The method of operating a chopper stabilized amplifier of claim 13 , wherein there are 90 degrees phase shifts between clocks of the first and second notch filters.

15. The method of operating a chopper stabilized amplifier of claim 13 , wherein frequencies of clocks of the first and second notch filters are half of the frequency of the chopped output signal.

Assignees

• Nxp Usa Inc

Inventors

• Fan Bo
• Wang Meng

Classifications

• H03F3/38 Primary

  DC amplifiers with modulator at input and demodulator at output; Modulators or demodulators specially adapted for use in such amplifiers {(switched capacitor amplifiers H03F3/005)} · CPC title

• H03F3/45475 Primary

  using IC blocks as the active amplifying circuit · CPC title

• H03F2200/459

  Ripple reduction circuitry being used in an amplifying circuit · CPC title

• H03F2200/171

  A filter circuit coupled to the output of an amplifier · CPC title

• H03F1/26 Primary

  Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title