Arrangement for actively suppressing interference signals

US10840801B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10840801-B2
Application numberUS-201815968959-A
CountryUS
Kind codeB2
Filing dateMay 2, 2018
Priority dateMay 24, 2017
Publication dateNov 17, 2020
Grant dateNov 17, 2020

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The invention, which relates to an arrangement (1) for the active suppression of interference signals, addresses the problem of specifying an arrangement (1) for the active suppression of interference signals, with which the reliable and secure compensation of the EMC interferences is achieved, which has a lower installation space requirement, generates less interference emission and is cost-effective of production. This problem is resolved thereby that beneath the main circuit board (12) disposed on the surface of the housing (10) a recess (14) is disposed and that in this recess (14) a circuit board (15) for the active EMC filter (4) is emplaced.

First claim

Opening claim text (preview).

The invention claimed is: 1. An arrangement for the active suppression of interference signals, comprising at least one main circuit board of an inverter having input and output terminals on a first side opposite to a second side, an active EMC filter, a housing of a refrigerant compressor, wherein, encompassed by the housing, a coolant is disposed and wherein the second side of the main circuit board is disposed on a surface of the housing opposite to the coolant, wherein beneath the at least one main circuit board disposed on the surface of the housing a first recess and a second recess are disposed in the housing and that in this recess a circuit board for the active EMC filter is emplaced; and power semiconductors are in the second recess disposed on the surface of the housing; and second side of the main circuit board comprises a shielding zone of an electrically conductive material, which completely covers the recesses. 2. An arrangement as in claim 1 , wherein the circuit board for the active EMC filter is connected with the housing of the refrigerant compressor across a thermally conductive layer having low heat transfer resistance. 3. An arrangement as claim 1 , wherein between the circuit board and the housing an insulation compound or a thermal interface material (TIM) is disposed. 4. An arrangement as in claim 1 , wherein at least one member selected from the group consisting of clamps, threaded fasteners and a thermally conductive adhesive is disposed on the surface of the housing for the securement of the circuit board. 5. An arrangement as in claim 1 , wherein the circuit board is an IMS circuit board with an aluminum carrier. 6. An arrangement as in claim 1 , wherein the electrically conducting material comprises at least one metal selected from the group consisting of copper, gold or aluminum. 7. An arrangement as in claim 1 , wherein the electric terminals of the circuit board are disposed such that they lead through the main circuit board. 8. An arrangement as in claim 1 , wherein that one or several of the components disposed on the circuit board are connected thermally conducting with the housing of the refrigerant compressor. 9. An arrangement as in claim 1 , wherein on the main circuit board a passive EMC filter is disposed which at the input side is connected upstream of the active EMC filter. 10. An arrangement as in claim 1 , wherein the circuit board for the active EMC filter is connected with the housing of the refrigerant compressor across a thermally conductive layer having low heat transfer resistance. 11. An arrangement as in one of claim 1 , wherein a thermal interface material (TIM) is disposed between the circuit board and the housing an insulation compound. 12. An arrangement as in one of claim 2 , wherein a thermal interface material (TIM) is disposed between the circuit board and the housing an insulation compound. 13. An arrangement as in claim 1 , wherein at least one member selected from the group consisting of a threaded fastener, a clamp and a thermally conductive adhesive is disposed on the surface of the housing for the securement of the circuit board. 14. An arrangement as in claim 2 , wherein at least one member selected from the group consisting of a threaded fastener, a clamp and a thermally conductive adhesive is disposed on the surface of the housing for the securement of the circuit board. 15. An arrangement as in claim 3 , wherein for the securement of the circuit board on the surface of the housing threaded fasteners, clamps or a thermally conductive adhesive is disposed. 16. An arrangement as claim 1 , wherein the circuit board is an IMS circuit board with an aluminum carrier. 17. An arrangement as claim 2 , wherein the circuit board is an IMS circuit board with an aluminum carrier. 18. An arrangement as claim 3 , wherein the circuit board is an IMS circuit board with an aluminum carrier. 19. An arrangement as claim 4 , wherein the circuit board is an IMS circuit board with an aluminum carrier.

Assignees

Inventors

Classifications

  • Housings with compartments containing a PCB, e.g. partitioning walls · CPC title

  • wherein the control and power circuits of a power converter are arranged within the same casing · CPC title

  • Heatsink mounted on the surface of the printed circuit board [PCB] · CPC title

  • Laminating printed circuit boards onto other substrates, e.g. metallic substrates (H05K1/0281 takes precedence) · CPC title

  • parallel to each other (H05K3/361 takes precedence) · CPC title

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Frequently asked questions

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What does patent US10840801B2 cover?
The invention, which relates to an arrangement (1) for the active suppression of interference signals, addresses the problem of specifying an arrangement (1) for the active suppression of interference signals, with which the reliable and secure compensation of the EMC interferences is achieved, which has a lower installation space requirement, generates less interference emission and is cost-ef…
Who is the assignee on this patent?
Hanon Systems
What technology area does this patent fall under?
Primary CPC classification H02M1/44. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 17 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).