Negative electroluminescent cooling device

Patent metadata

Field	Value
Publication number	US-10840163-B2
Application number	US-201815861903-A
Country	US
Kind code	B2
Filing date	Jan 4, 2018
Priority date	Jan 4, 2018
Publication date	Nov 17, 2020
Grant date	Nov 17, 2020

Abstract

A negative electroluminescent cooling device including a first layer of material; a second layer of material arranged at a non-zero distance from the first layer of material with help of a set of supporters, and an energy source to apply a reverse bias voltage to the first layer of material to cool the second layer of material. The material of the first layer is a semiconductor with a bandgap less or equal to a surface resonant energy of the second layer of material.

First claim

We claim:

1. A negative electroluminescent cooling device, comprising:
a first layer of material;
a second layer of material arranged at a non-zero distance from the first layer of material, wherein the first layer of material includes a semiconductor with a bandgap less than or equal to a surface resonant energy of the second layer of material;
a set of supporters to connect and support the first layer of material and the second layer of material while allowing passage of photons from the second layer of material to the first layer of material, wherein the set of supporters is a set of pillars of oxides or semiconductor materials, such that a combined cross-section area of a cross-section area of each pillar from for the set of pillars is more than 100000 times smaller than an area of the cross-section of the first layer of material or the second layer of material, and
wherein the surface resonant energy of the second layer of material corresponds to a resonant frequency of the second layer of material, wherein the resonant frequency of the second layer of material is in a range between 10 to 1000 nanometers (nm), and wherein the distance between the first layer of material and the second layer of material is smaller than a wavelength of the resonant frequency of the second layer of material; and
an energy source to apply a reverse bias voltage to the first layer of material to cool the second layer of material.

2. The device of claim 1 , wherein the second layer of material includes a metal or a doped semiconductor.

3. The device of claim 2 , wherein a surface of the second layer of material closest to the first layer of material is patterned with nano-scale structures.

4. The device of claim 3 , wherein the pattern of the nano-scale structures is selected to match the surface resonant energy of the second layer of material to the bandgap of the semiconductor of the first layer of material.

5. The device of claim 3 , wherein the pattern of the nano-scale structures and a mutual arrangement of the first layer of material and the second layer of material establish a surface plasmon resonance between the first layer of material and the second layer of material.

6. The device of claim 1 , wherein the second layer of material includes plasmonic material.

7. The device of claim 6 , wherein the plasmonic material is zirconium carbide (ZrC).

8. The device of claim 1 , wherein the first layer of material includes a p-doped region, an n-doped region, and an undoped region extending between the p-doped region and the n-doped region, and a reverse bias voltage across the p-doped and n-doped regions that drives electrons out of the semiconductor of the first layer of material.

9. The device of claim 1 , wherein an amplitude of the reverse bias voltage, multiplied by an electron charge, is between two and three times an energy of the bandgap.

10. The device of claim 1 , wherein a ratio of an energy of the bandgap to the resonant surface energy is between 1 and 1.2.

11. The device of claim 1 , wherein the thickness of the first layer of material is between 1 and 3 μm.

12. The device of claim 1 , wherein the first layer of material serves as a heat sink to cool the second layer of material.

13. The device of claim 1 , wherein the second layer of material forms at least part of one or combination of a processor, a light-emitting-diode, a transistor, and a power amplifier.

14. A method for manufacturing a negative electroluminescent cooling device, comprising:
providing a first layer and a second layer of material;
arranging the second layer of material at a non-zero distance from a first layer of material, wherein the first layer of material includes a semiconductor with a bandgap less than or equal to a surface resonant energy of the second layer of material;
connecting a set of supporters to support the first layer of material and the second layer of material while allowing passage of photons from the second layer of material to the first layer of material, wherein the set of supporters is a set of pillars of oxides or semiconductor materials, such that a combined cross-section area of a cross-section area of each pillar for the set of pillars is more than 100000 times smaller than an area of the cross-section of the first layer of material or the second layer of material, and
wherein the surface resonant energy of the second layer of material corresponds to a resonant frequency of the second layer of material, wherein the resonant frequency of the second layer of material is in a range between 10 to 1000 nanometers (nm), and wherein the distance between the first layer of material and the second layer of material is smaller than a wavelength of the resonant frequency of the second layer of material; and
applying a reverse bias voltage using an energy source to the first layer of material to cool the second layer of material.

15. The method of claim 14 , further comprising: patterning a surface of the second layer of material closest to the first layer of material with nano-scale structures, wherein the second layer of material includes a metal or a doped semiconductor, such that the pattern of the nano-scale structures is selected to match the surface resonant energy of the second layer of material to the bandgap of the semiconductor of the first layer of material.

16. The method of claim 14 , wherein the first layer of material includes a p-doped region, an n-doped region, and an undoped region extending between the p-doped region and the n-doped region, and a reverse bias voltage across the p-doped and n-doped regions that drives electrons out of the semiconductor of the first layer of material.

Assignees

• Mitsubishi Electric Res Laboratories Inc

Inventors

• Lin Chungwei
• Wang Bingnan
• Teo Koon Hoo

Classifications

• H10W40/22 Primary

  characterised by their shape, e.g. having conical or cylindrical projections · CPC title

• H10H20/8581 Primary

  characterised by their material · CPC title

• H10H20/858

  Means for heat extraction or cooling · CPC title

• H10H20/81

  Bodies · CPC title

• H01L33/64

  Electricity · mapped topic